4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
6 * SPDX-License-Identifier: GPL-2.0+
8 * The various ARMv7 SoCs from TI all share a number of IP blocks when
9 * implementing a given feature. Rather than define these in every
10 * board or even SoC common file, we define a common file to be re-used
11 * in all cases. While technically true that some of these details are
12 * configurable at the board design, they are common throughout SoC
13 * reference platforms as well as custom designs and become de facto
17 #ifndef __CONFIG_TI_ARMV7_COMMON_H__
18 #define __CONFIG_TI_ARMV7_COMMON_H__
20 /* Common define for many platforms. */
22 #define CONFIG_OMAP_COMMON
25 * We typically do not contain NOR flash. In the cases where we do, we
26 * undefine this later.
28 #define CONFIG_SYS_NO_FLASH
30 /* Support both device trees and ATAGs. */
31 #define CONFIG_OF_LIBFDT
32 #define CONFIG_CMDLINE_TAG
33 #define CONFIG_SETUP_MEMORY_TAGS
34 #define CONFIG_INITRD_TAG
37 * Our DDR memory always starts at 0x80000000 and U-Boot shall have
38 * relocated itself to higher in memory by the time this value is used.
40 #define CONFIG_SYS_LOAD_ADDR 0x80000000
43 * Default to a quick boot delay.
45 #define CONFIG_BOOTDELAY 1
48 * DDR information. We say (for simplicity) that we have 1 bank,
49 * always, even when we have more. We always start at 0x80000000,
50 * and we place the initial stack pointer in our SRAM.
52 #define CONFIG_NR_DRAM_BANKS 1
53 #define CONFIG_SYS_SDRAM_BASE 0x80000000
54 #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
55 GENERATED_GBL_DATA_SIZE)
57 /* Timer information. */
58 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
59 #define CONFIG_SYS_HZ 1000 /* 1ms clock */
63 #define CONFIG_CMD_I2C
64 #define CONFIG_HARD_I2C
65 #define CONFIG_SYS_I2C_SPEED 100000
66 #define CONFIG_SYS_I2C_SLAVE 1
67 #define CONFIG_I2C_MULTI_BUS
68 #define CONFIG_DRIVER_OMAP24XX_I2C
72 #define CONFIG_GENERIC_MMC
73 #define CONFIG_OMAP_HSMMC
74 #define CONFIG_CMD_MMC
78 #define CONFIG_OMAP3_SPI
81 #define CONFIG_OMAP_GPIO
84 * GPMC NAND block. We support 1 device and the physical address to
85 * access CS0 at is 0x8000000.
88 #define CONFIG_CMD_NAND
89 #define CONFIG_NAND_OMAP_GPMC
90 #define CONFIG_SYS_NAND_BASE 0x8000000
91 #define CONFIG_SYS_MAX_NAND_DEVICE 1
95 * The following are general good-enough settings for U-Boot. We set a
96 * large malloc pool as we generally have a lot of DDR, and we opt for
97 * function over binary size in the main portion of U-Boot as this is
98 * generally easily constrained later if needed. We enable the config
99 * options that give us information in the environment about what board
100 * we are on so we do not need to rely on the command prompt. We set a
101 * console baudrate of 115200 and use the default baud rate table.
103 #define CONFIG_SYS_MALLOC_LEN (1024 << 10)
104 #define CONFIG_SYS_LONGHELP
105 #define CONFIG_SYS_HUSH_PARSER
106 #define CONFIG_AUTO_COMPLETE
107 #define CONFIG_CMDLINE_EDITING
108 #define CONFIG_SYS_PROMPT "U-Boot# "
109 #define CONFIG_VERSION_VARIABLE
110 #define CONFIG_ENV_VARS_UBOOT_CONFIG
111 #define CONFIG_BAUDRATE 115200
113 /* We set the max number of command args high to avoid HUSH bugs. */
114 #define CONFIG_SYS_MAXARGS 64
116 /* Console I/O Buffer Size */
117 #define CONFIG_SYS_CBSIZE 512
118 /* Print Buffer Size */
119 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
120 + sizeof(CONFIG_SYS_PROMPT) + 16)
121 /* Boot Argument Buffer Size */
122 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
124 #define CONFIG_ENV_OVERWRITE
125 #define CONFIG_SYS_CONSOLE_INFO_QUIET
128 * When we have SPI, NOR or NAND flash we expect to be making use of
129 * mtdparts, both for ease of use in U-Boot and for passing information
130 * on to the Linux kernel.
132 #if defined(CONFIG_SPI_BOOT) || defined(CONFIG_NOR) || defined(CONFIG_NAND)
133 #define CONFIG_MTD_DEVICE /* Required for mtdparts */
134 #define CONFIG_CMD_MTDPARTS
138 * For commands to use, we take the default list and add a few other
139 * useful commands. Note that we must have set CONFIG_SYS_NO_FLASH
140 * prior to this include, in order to skip a few commands. When we do
141 * have flash, if we expect these commands they must be enabled in that
144 #include <config_cmd_default.h>
145 #define CONFIG_CMD_ASKENV
146 #define CONFIG_CMD_ECHO
147 #define CONFIG_CMD_BOOTZ
150 * Common filesystems support. When we have removable storage we
151 * enabled a number of useful commands and support.
153 #if defined(CONFIG_MMC) || defined(CONFIG_USB_STORAGE)
154 #define CONFIG_DOS_PARTITION
155 #define CONFIG_CMD_FAT
156 #define CONFIG_FAT_WRITE
157 #define CONFIG_CMD_EXT2
158 #define CONFIG_CMD_EXT4
159 #define CONFIG_CMD_FS_GENERIC
163 * Our platforms make use of SPL to initalize the hardware (primarily
164 * memory) enough for full U-Boot to be loaded. We also support Falcon
165 * Mode so that the Linux kernel can be booted directly from SPL
166 * instead, if desired. We make use of the general SPL framework found
167 * under common/spl/. Given our generally common memory map, we set a
168 * number of related defaults and sizes here.
170 #ifndef CONFIG_NOR_BOOT
172 #define CONFIG_SPL_FRAMEWORK
173 #define CONFIG_SPL_OS_BOOT
176 * Place the image at the start of the ROM defined image space.
177 * We limit our size to the ROM-defined downloaded image area, and use the
178 * rest of the space for stack. We load U-Boot itself into memory at
179 * 0x80800000 for legacy reasons (to not conflict with older SPLs). We
180 * have our BSS be placed 1MiB after this, to allow for the default
181 * Linux kernel address of 0x80008000 to work, in the Falcon Mode case.
182 * We have the SPL malloc pool at the end of the BSS area.
184 #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
185 #define CONFIG_SYS_TEXT_BASE 0x80800000
186 #define CONFIG_SPL_BSS_START_ADDR 0x80a00000
187 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
188 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
189 CONFIG_SPL_BSS_MAX_SIZE)
190 #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
192 /* RAW SD card / eMMC locations. */
193 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
194 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
196 /* FAT sd card locations. */
197 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
198 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
200 #ifdef CONFIG_SPL_OS_BOOT
201 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + 0x100)
204 #define CONFIG_SPL_FAT_LOAD_KERNEL_NAME "uImage"
205 #define CONFIG_SPL_FAT_LOAD_ARGS_NAME "args"
207 /* RAW SD card / eMMC */
208 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */
209 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */
210 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */
214 #define CONFIG_CMD_SPL_NAND_OFS 0x240000 /* end of u-boot */
215 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
216 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
219 /* spl export command */
220 #define CONFIG_CMD_SPL
224 #define CONFIG_SPL_MMC_SUPPORT
225 #define CONFIG_SPL_FAT_SUPPORT
228 /* General parts of the framework. */
229 #define CONFIG_SPL_I2C_SUPPORT
230 #define CONFIG_SPL_LIBCOMMON_SUPPORT
231 #define CONFIG_SPL_LIBDISK_SUPPORT
232 #define CONFIG_SPL_LIBGENERIC_SUPPORT
233 #define CONFIG_SPL_SERIAL_SUPPORT
234 #define CONFIG_SPL_GPIO_SUPPORT
235 #define CONFIG_SPL_BOARD_INIT
238 #define CONFIG_SPL_NAND_AM33XX_BCH /* OMAP4 and later ELM support */
239 #define CONFIG_SPL_NAND_SUPPORT
240 #define CONFIG_SPL_NAND_BASE
241 #define CONFIG_SPL_NAND_DRIVERS
242 #define CONFIG_SPL_NAND_ECC
243 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
244 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
246 #endif /* !CONFIG_NOR_BOOT */
248 #endif /* __CONFIG_TI_ARMV7_COMMON_H__ */