2 * (C) Copyright 2010-2012
3 * NVIDIA Corporation <www.nvidia.com>
5 * SPDX-License-Identifier: GPL-2.0+
8 #ifndef _TEGRA_COMMON_H_
9 #define _TEGRA_COMMON_H_
10 #include <linux/sizes.h>
11 #include <linux/stringify.h>
14 * High Level Configuration Options
16 #define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */
17 #define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */
19 #include <asm/arch/tegra.h> /* get chip and board defs */
21 #define CONFIG_SYS_TIMER_RATE 1000000
22 #define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE
25 * Display CPU and Board information
27 #define CONFIG_DISPLAY_CPUINFO
28 #define CONFIG_DISPLAY_BOARDINFO
30 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
33 #define CONFIG_ENV_VARS_UBOOT_CONFIG
34 #define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */
37 * Size of malloc() pool
40 #define CONFIG_SYS_MALLOC_LEN ((4 << 20) + \
41 CONFIG_SYS_DFU_DATA_BUF_SIZE)
43 #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */
46 #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */
49 * NS16550 Configuration
51 #define CONFIG_TEGRA_SERIAL
52 #define CONFIG_SYS_NS16550
55 * Common HW configuration.
56 * If this varies between SoCs later, move to tegraNN-common.h
57 * Note: This is number of devices, not max device ID.
59 #define CONFIG_SYS_MMC_MAX_DEVICE 4
62 * select serial console configuration
64 #define CONFIG_CONS_INDEX 1
66 /* allow to overwrite serial and ethaddr */
67 #define CONFIG_ENV_OVERWRITE
68 #define CONFIG_BAUDRATE 115200
70 /* turn on command-line edit/hist/auto */
71 #define CONFIG_COMMAND_HISTORY
73 /* turn on commonly used storage-related commands */
74 #define CONFIG_PARTITION_UUIDS
75 #define CONFIG_CMD_PART
77 #define CONFIG_SYS_NO_FLASH
79 #define CONFIG_CONSOLE_MUX
80 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
81 #ifndef CONFIG_SPL_BUILD
82 #define CONFIG_SYS_STDIO_DEREGISTER
86 * Miscellaneous configurable options
88 #define CONFIG_SYS_PROMPT V_PROMPT
90 * Increasing the size of the IO buffer as default nfsargs size is more
91 * than 256 and so it is not possible to edit it
93 #define CONFIG_SYS_CBSIZE (256 * 2) /* Console I/O Buffer Size */
94 /* Print Buffer Size */
95 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
96 sizeof(CONFIG_SYS_PROMPT) + 16)
97 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
98 /* Boot Argument Buffer Size */
99 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
101 #define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000)
102 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
104 #ifndef CONFIG_SPL_BUILD
105 #define CONFIG_USE_ARCH_MEMCPY
108 /*-----------------------------------------------------------------------
109 * Physical Memory Map
111 #define CONFIG_NR_DRAM_BANKS 1
112 #define PHYS_SDRAM_1 NV_PA_SDRC_CS0
113 #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
115 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
116 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
118 #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */
120 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE
121 #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
122 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
123 CONFIG_SYS_INIT_RAM_SIZE - \
124 GENERATED_GBL_DATA_SIZE)
126 #define CONFIG_TEGRA_GPIO
127 #define CONFIG_CMD_GPIO
128 #define CONFIG_CMD_ENTERRCM
130 /* Defines for SPL */
131 #define CONFIG_SPL_FRAMEWORK
132 #define CONFIG_SPL_RAM_DEVICE
133 #define CONFIG_SPL_BOARD_INIT
134 #define CONFIG_SPL_NAND_SIMPLE
135 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \
136 CONFIG_SPL_TEXT_BASE)
137 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
139 #define CONFIG_SPL_LIBCOMMON_SUPPORT
140 #define CONFIG_SPL_LIBGENERIC_SUPPORT
141 #define CONFIG_SPL_SERIAL_SUPPORT
142 #define CONFIG_SPL_GPIO_SUPPORT
144 #define CONFIG_SYS_GENERIC_BOARD
145 #define CONFIG_BOARD_EARLY_INIT_F
146 #define CONFIG_BOARD_LATE_INIT
148 /* Misc utility code */
149 #define CONFIG_BOUNCE_BUFFER
150 #define CONFIG_CRC32_VERIFY
152 #ifndef CONFIG_SPL_BUILD
153 #include <config_distro_defaults.h>
156 #endif /* _TEGRA_COMMON_H_ */