3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
5 * Copyright (C) 2009 TechNexion Ltd.
7 * SPDX-License-Identifier: GPL-2.0+
14 * High Level Configuration Options
17 #define CONFIG_SYS_TEXT_BASE 0x80008000
19 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */
21 #include <asm/arch/cpu.h> /* get chip and board defs */
22 #include <asm/arch/omap.h>
25 #define V_OSCK 26000000 /* Clock output from T2 */
26 #define V_SCLK (V_OSCK >> 1)
28 #define CONFIG_MISC_INIT_R
30 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
31 #define CONFIG_SETUP_MEMORY_TAGS
32 #define CONFIG_INITRD_TAG
33 #define CONFIG_REVISION_TAG
36 * Size of malloc() pool
38 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
39 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \
44 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
51 * NS16550 Configuration
53 #define CONFIG_SYS_NS16550_SERIAL
54 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
55 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
58 * select serial console configuration
60 #define CONFIG_CONS_INDEX 1
61 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
62 #define CONFIG_SERIAL1 /* UART1 */
64 /* allow to overwrite serial and ethaddr */
65 #define CONFIG_ENV_OVERWRITE
66 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
69 #define CONFIG_USB_EHCI_OMAP
70 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25
71 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
73 /* commands to include */
74 #define CONFIG_CMD_NAND /* NAND support */
75 #define CONFIG_CMD_EEPROM
77 #define CONFIG_SYS_I2C
78 #define CONFIG_SYS_OMAP24_I2C_SPEED 400000
79 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
80 #define CONFIG_SYS_I2C_OMAP34XX
81 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
82 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
83 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
88 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
92 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
95 #define CONFIG_AUTO_COMPLETE
98 * Miscellaneous configurable options
100 #define CONFIG_SYS_LONGHELP /* undef to save memory */
101 #define CONFIG_CMDLINE_EDITING
102 #define CONFIG_AUTO_COMPLETE
103 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
105 /* Print Buffer Size */
106 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
107 sizeof(CONFIG_SYS_PROMPT) + 16)
108 #define CONFIG_SYS_MAXARGS 32 /* max number of command */
110 /* Boot Argument Buffer Size */
111 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
112 /* memtest works on */
113 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
114 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
115 0x01F00000) /* 31MB */
117 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
121 * AM3517 has 12 GP timers, they can be driven by the system clock
122 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
123 * This rate is divided by a local divisor.
125 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
126 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
129 * Physical Memory Map
131 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
132 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
133 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
136 * FLASH and environment organization
139 /* **** PISMO SUPPORT *** */
141 #define CONFIG_NAND_OMAP_GPMC
142 #define CONFIG_ENV_IS_IN_NAND
143 #define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */
145 /* Redundant Environment */
146 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
147 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
148 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
149 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
150 2 * CONFIG_SYS_ENV_SECT_SIZE)
151 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
153 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
154 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
155 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
156 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
157 CONFIG_SYS_INIT_RAM_SIZE - \
158 GENERATED_GBL_DATA_SIZE)
161 * ethernet support, EMAC
164 #define CONFIG_DRIVER_TI_EMAC
165 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
167 #define CONFIG_BOOTP_DNS
168 #define CONFIG_BOOTP_DNS2
169 #define CONFIG_BOOTP_SEND_HOSTNAME
170 #define CONFIG_NET_RETRY_COUNT 10
172 /* Defines for SPL */
173 #define CONFIG_SPL_FRAMEWORK
174 #define CONFIG_SPL_BOARD_INIT
175 #define CONFIG_SPL_CONSOLE
176 #define CONFIG_SPL_NAND_SIMPLE
177 #define CONFIG_SPL_NAND_SOFTECC
178 #define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */
180 #define CONFIG_SPL_NAND_BASE
181 #define CONFIG_SPL_NAND_DRIVERS
182 #define CONFIG_SPL_NAND_ECC
183 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
185 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
186 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
187 CONFIG_SPL_TEXT_BASE)
188 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
190 #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000
191 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
192 #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */
193 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
195 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
196 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
199 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
200 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
202 /* RAW SD card / eMMC */
203 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */
204 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */
205 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */
207 /* NAND boot config */
208 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
209 #define CONFIG_SYS_NAND_PAGE_COUNT 64
210 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
211 #define CONFIG_SYS_NAND_OOBSIZE 64
212 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
213 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
214 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
215 #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\
216 48, 49, 50, 51, 52, 53, 54, 55,\
217 56, 57, 58, 59, 60, 61, 62, 63}
218 #define CONFIG_SYS_NAND_ECCSIZE 256
219 #define CONFIG_SYS_NAND_ECCBYTES 3
220 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW
221 #define CONFIG_NAND_OMAP_GPMC_PREFETCH
223 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
225 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
226 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
228 #define CONFIG_CMD_UBIFS
229 #define CONFIG_RBTREE
231 #define CONFIG_MTD_PARTITIONS
232 #define CONFIG_MTD_DEVICE
233 #define CONFIG_CMD_MTDPARTS
235 /* Setup MTD for NAND on the SOM */
236 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
237 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \
238 "1m(u-boot),256k(env1)," \
239 "256k(env2),6m(kernel),-(rootfs)"
241 #define CONFIG_TAM3517_SETTINGS \
243 "nandargs=setenv bootargs root=${nandroot} " \
244 "rootfstype=${nandrootfstype}\0" \
245 "nfsargs=setenv bootargs root=/dev/nfs rw " \
246 "nfsroot=${serverip}:${rootpath}\0" \
247 "ramargs=setenv bootargs root=/dev/ram rw\0" \
248 "addip_sta=setenv bootargs ${bootargs} " \
249 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
250 ":${hostname}:${netdev}:off panic=1\0" \
251 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
252 "addip=if test -n ${ipdyn};then run addip_dyn;" \
253 "else run addip_sta;fi\0" \
254 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
255 "addtty=setenv bootargs ${bootargs}" \
256 " console=ttyO0,${baudrate}\0" \
257 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
258 "loadaddr=82000000\0" \
259 "kernel_addr_r=82000000\0" \
260 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
261 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
262 "flash_self=run ramargs addip addtty addmtd addmisc;" \
263 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
264 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
265 "bootm ${kernel_addr}\0" \
266 "nandboot=run nandargs addip addtty addmtd addmisc;" \
267 "nand read ${kernel_addr_r} kernel\0" \
268 "bootm ${kernel_addr_r}\0" \
269 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
270 "run nfsargs addip addtty addmtd addmisc;" \
271 "bootm ${kernel_addr_r}\0" \
272 "net_self=if run net_self_load;then " \
273 "run ramargs addip addtty addmtd addmisc;" \
274 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
275 "else echo Images not loades;fi\0" \
276 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0" \
277 "load=tftp ${loadaddr} ${u-boot}\0" \
278 "loadmlo=tftp ${loadaddr} ${mlo}\0" \
279 "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0" \
280 "uboot_addr=0x80000\0" \
281 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \
282 "nand write ${loadaddr} ${uboot_addr} 80000\0" \
283 "updatemlo=nandecc hw;nand erase 0 20000;" \
284 "nand write ${loadaddr} 0 20000\0" \
285 "upd=if run load;then echo Updating u-boot;if run update;" \
286 "then echo U-Boot updated;" \
287 "else echo Error updating u-boot !;" \
288 "echo Board without bootloader !!;" \
290 "else echo U-Boot not downloaded..exiting;fi\0" \
293 * this is common code for all TAM3517 boards.
294 * MAC address is stored from manufacturer in
297 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
299 * The I2C EEPROM on the TAM3517 contains
300 * mac address and production data
302 struct tam3517_module_info {
307 * bit 0~47 : sequence number
308 * bit 48~55 : week of year, from 0.
311 unsigned long long sequence_number;
314 * bit 0~7 : revision fixed
315 * bit 8~15 : revision major
318 unsigned int revision;
319 unsigned char eth_addr[4][8];
320 unsigned char _rev[100];
323 #define TAM3517_READ_EEPROM(info, ret) \
325 i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \
326 if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \
327 (void *)info, sizeof(*info))) \
333 #define TAM3517_READ_MAC_FROM_EEPROM(info) \
335 char buf[80], ethname[20]; \
337 memset(buf, 0, sizeof(buf)); \
338 for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) { \
339 sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X", \
340 (info)->eth_addr[i][5], \
341 (info)->eth_addr[i][4], \
342 (info)->eth_addr[i][3], \
343 (info)->eth_addr[i][2], \
344 (info)->eth_addr[i][1], \
345 (info)->eth_addr[i][0]); \
348 sprintf(ethname, "eth%daddr", i); \
350 strcpy(ethname, "ethaddr"); \
351 printf("Setting %s from EEPROM with %s\n", ethname, buf);\
352 setenv(ethname, buf); \
356 /* The following macros are taken from Technexion's documentation */
357 #define TAM3517_sequence_number(info) \
358 ((info)->sequence_number % 0x1000000000000LL)
359 #define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100)
360 #define TAM3517_year(info) ((info)->sequence_number >> 56)
361 #define TAM3517_revision_fixed(info) ((info)->revision % 0x100)
362 #define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100)
363 #define TAM3517_revision_tn(info) ((info)->revision >> 16)
365 #define TAM3517_PRINT_SOM_INFO(info) \
367 printf("Vendor:%s\n", (info)->customer); \
368 printf("SOM: %s\n", (info)->product); \
369 printf("SeqNr: %02llu%02llu%012llu\n", \
370 TAM3517_year(info), \
371 TAM3517_week_of_year(info), \
372 TAM3517_sequence_number(info)); \
373 printf("Rev: TN%u %u.%u\n", \
374 TAM3517_revision_tn(info), \
375 TAM3517_revision_major(info), \
376 TAM3517_revision_fixed(info)); \
381 #endif /* __TAM3517_H */