1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
6 * Copyright (C) 2009 TechNexion Ltd.
13 * High Level Configuration Options
16 #include <asm/arch/cpu.h> /* get chip and board defs */
17 #include <asm/arch/omap.h>
20 #define V_OSCK 26000000 /* Clock output from T2 */
21 #define V_SCLK (V_OSCK >> 1)
23 #define CONFIG_MISC_INIT_R
25 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
26 #define CONFIG_SETUP_MEMORY_TAGS
27 #define CONFIG_INITRD_TAG
28 #define CONFIG_REVISION_TAG
31 * Size of malloc() pool
33 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
34 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \
39 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
46 * NS16550 Configuration
48 #define CONFIG_SYS_NS16550_SERIAL
49 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
50 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
53 * select serial console configuration
55 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
56 #define CONFIG_SERIAL1 /* UART1 */
58 /* allow to overwrite serial and ethaddr */
59 #define CONFIG_ENV_OVERWRITE
60 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
63 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25
65 #define CONFIG_SYS_I2C
66 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
67 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
68 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
73 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
77 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
81 * Miscellaneous configurable options
83 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
85 #define CONFIG_SYS_MAXARGS 32 /* max number of command */
87 /* memtest works on */
88 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
89 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
90 0x01F00000) /* 31MB */
92 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
96 * AM3517 has 12 GP timers, they can be driven by the system clock
97 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
98 * This rate is divided by a local divisor.
100 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
101 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
104 * Physical Memory Map
106 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
107 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
110 * FLASH and environment organization
113 /* **** PISMO SUPPORT *** */
115 /* Redundant Environment */
116 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
117 #define CONFIG_ENV_OFFSET 0x180000
118 #define CONFIG_ENV_ADDR 0x180000
119 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
120 2 * CONFIG_SYS_ENV_SECT_SIZE)
121 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
123 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
124 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
125 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
126 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
127 CONFIG_SYS_INIT_RAM_SIZE - \
128 GENERATED_GBL_DATA_SIZE)
131 * ethernet support, EMAC
134 #define CONFIG_DRIVER_TI_EMAC
135 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
137 #define CONFIG_BOOTP_DNS2
138 #define CONFIG_BOOTP_SEND_HOSTNAME
139 #define CONFIG_NET_RETRY_COUNT 10
141 /* Defines for SPL */
142 #define CONFIG_SPL_CONSOLE
143 #define CONFIG_SPL_NAND_SOFTECC
144 #define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */
146 #define CONFIG_SPL_NAND_BASE
147 #define CONFIG_SPL_NAND_DRIVERS
148 #define CONFIG_SPL_NAND_ECC
150 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
151 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
152 CONFIG_SPL_TEXT_BASE)
153 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
155 #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000
156 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
157 #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */
158 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
160 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
161 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
164 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
165 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
167 /* RAW SD card / eMMC */
168 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */
169 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */
170 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */
172 /* NAND boot config */
173 #define CONFIG_SYS_NAND_PAGE_COUNT 64
174 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
175 #define CONFIG_SYS_NAND_OOBSIZE 64
176 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
177 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
178 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
179 #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\
180 48, 49, 50, 51, 52, 53, 54, 55,\
181 56, 57, 58, 59, 60, 61, 62, 63}
182 #define CONFIG_SYS_NAND_ECCSIZE 256
183 #define CONFIG_SYS_NAND_ECCBYTES 3
184 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW
186 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
188 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
189 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
191 /* Setup MTD for NAND on the SOM */
193 #define CONFIG_TAM3517_SETTINGS \
195 "nandargs=setenv bootargs root=${nandroot} " \
196 "rootfstype=${nandrootfstype}\0" \
197 "nfsargs=setenv bootargs root=/dev/nfs rw " \
198 "nfsroot=${serverip}:${rootpath}\0" \
199 "ramargs=setenv bootargs root=/dev/ram rw\0" \
200 "addip_sta=setenv bootargs ${bootargs} " \
201 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
202 ":${hostname}:${netdev}:off panic=1\0" \
203 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
204 "addip=if test -n ${ipdyn};then run addip_dyn;" \
205 "else run addip_sta;fi\0" \
206 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
207 "addtty=setenv bootargs ${bootargs}" \
208 " console=ttyO0,${baudrate}\0" \
209 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
210 "loadaddr=82000000\0" \
211 "kernel_addr_r=82000000\0" \
212 "hostname=" CONFIG_HOSTNAME "\0" \
213 "bootfile=" CONFIG_HOSTNAME "/uImage\0" \
214 "flash_self=run ramargs addip addtty addmtd addmisc;" \
215 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
216 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
217 "bootm ${kernel_addr}\0" \
218 "nandboot=run nandargs addip addtty addmtd addmisc;" \
219 "nand read ${kernel_addr_r} kernel\0" \
220 "bootm ${kernel_addr_r}\0" \
221 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
222 "run nfsargs addip addtty addmtd addmisc;" \
223 "bootm ${kernel_addr_r}\0" \
224 "net_self=if run net_self_load;then " \
225 "run ramargs addip addtty addmtd addmisc;" \
226 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
227 "else echo Images not loades;fi\0" \
228 "u-boot=" CONFIG_HOSTNAME "/u-boot.img\0" \
229 "load=tftp ${loadaddr} ${u-boot}\0" \
230 "loadmlo=tftp ${loadaddr} ${mlo}\0" \
231 "mlo=" CONFIG_HOSTNAME "/MLO\0" \
232 "uboot_addr=0x80000\0" \
233 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \
234 "nand write ${loadaddr} ${uboot_addr} 80000\0" \
235 "updatemlo=nandecc hw;nand erase 0 20000;" \
236 "nand write ${loadaddr} 0 20000\0" \
237 "upd=if run load;then echo Updating u-boot;if run update;" \
238 "then echo U-Boot updated;" \
239 "else echo Error updating u-boot !;" \
240 "echo Board without bootloader !!;" \
242 "else echo U-Boot not downloaded..exiting;fi\0" \
245 * this is common code for all TAM3517 boards.
246 * MAC address is stored from manufacturer in
249 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
251 * The I2C EEPROM on the TAM3517 contains
252 * mac address and production data
254 struct tam3517_module_info {
259 * bit 0~47 : sequence number
260 * bit 48~55 : week of year, from 0.
263 unsigned long long sequence_number;
266 * bit 0~7 : revision fixed
267 * bit 8~15 : revision major
270 unsigned int revision;
271 unsigned char eth_addr[4][8];
272 unsigned char _rev[100];
275 #define TAM3517_READ_EEPROM(info, ret) \
277 i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \
278 if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \
279 (void *)info, sizeof(*info))) \
285 #define TAM3517_READ_MAC_FROM_EEPROM(info) \
287 char buf[80], ethname[20]; \
289 memset(buf, 0, sizeof(buf)); \
290 for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) { \
291 sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X", \
292 (info)->eth_addr[i][5], \
293 (info)->eth_addr[i][4], \
294 (info)->eth_addr[i][3], \
295 (info)->eth_addr[i][2], \
296 (info)->eth_addr[i][1], \
297 (info)->eth_addr[i][0]); \
300 sprintf(ethname, "eth%daddr", i); \
302 strcpy(ethname, "ethaddr"); \
303 printf("Setting %s from EEPROM with %s\n", ethname, buf);\
304 env_set(ethname, buf); \
308 /* The following macros are taken from Technexion's documentation */
309 #define TAM3517_sequence_number(info) \
310 ((info)->sequence_number % 0x1000000000000LL)
311 #define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100)
312 #define TAM3517_year(info) ((info)->sequence_number >> 56)
313 #define TAM3517_revision_fixed(info) ((info)->revision % 0x100)
314 #define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100)
315 #define TAM3517_revision_tn(info) ((info)->revision >> 16)
317 #define TAM3517_PRINT_SOM_INFO(info) \
319 printf("Vendor:%s\n", (info)->customer); \
320 printf("SOM: %s\n", (info)->product); \
321 printf("SeqNr: %02llu%02llu%012llu\n", \
322 TAM3517_year(info), \
323 TAM3517_week_of_year(info), \
324 TAM3517_sequence_number(info)); \
325 printf("Rev: TN%u %u.%u\n", \
326 TAM3517_revision_tn(info), \
327 TAM3517_revision_major(info), \
328 TAM3517_revision_fixed(info)); \
333 #endif /* __TAM3517_H */