2 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
4 * (C) Copyright 2007-2011
5 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
6 * Tom Cubie <tangliang@allwinnertech.com>
8 * Configuration settings for the Allwinner sunxi series of boards.
10 * SPDX-License-Identifier: GPL-2.0+
13 #ifndef _SUNXI_COMMON_CONFIG_H
14 #define _SUNXI_COMMON_CONFIG_H
16 #include <asm/arch/cpu.h>
17 #include <linux/stringify.h>
19 #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
21 * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
22 * expense of restricting some features, so the regular machine id values can
25 # define CONFIG_MACH_TYPE_COMPAT_REV 0
28 * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
29 * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
30 * beyond the machine id check.
32 # define CONFIG_MACH_TYPE_COMPAT_REV 1
36 * High Level Configuration Options
38 #define CONFIG_SUNXI /* sunxi family */
39 #ifdef CONFIG_SPL_BUILD
40 #define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */
43 /* Serial & console */
44 #define CONFIG_SYS_NS16550_SERIAL
45 /* ns16550 reg in the low bits of cpu reg */
46 #define CONFIG_SYS_NS16550_CLK 24000000
47 #ifndef CONFIG_DM_SERIAL
48 # define CONFIG_SYS_NS16550_REG_SIZE -4
49 # define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
50 # define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
51 # define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
52 # define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
53 # define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
57 #define CONFIG_DISPLAY_CPUINFO
58 #define CONFIG_TIMER_CLK_FREQ 24000000
61 * The DRAM Base differs between some models. We cannot use macros for the
62 * CONFIG_FOO defines which contain the DRAM base address since they end
63 * up unexpanded in include/autoconf.mk .
65 * So we have to have this #ifdef #else #endif block for these.
67 #ifdef CONFIG_MACH_SUN9I
68 #define SDRAM_OFFSET(x) 0x2##x
69 #define CONFIG_SYS_SDRAM_BASE 0x20000000
70 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */
71 #define CONFIG_SYS_TEXT_BASE 0x2a000000
72 #define CONFIG_PRE_CON_BUF_ADDR 0x2f000000
73 /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
74 * since it needs to fit in with the other values. By also #defining it
75 * we get warnings if the Kconfig value mismatches. */
76 #define CONFIG_SPL_STACK_R_ADDR 0x2fe00000
77 #define CONFIG_SPL_BSS_START_ADDR 0x2ff80000
79 #define SDRAM_OFFSET(x) 0x4##x
80 #define CONFIG_SYS_SDRAM_BASE 0x40000000
81 #define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */
82 #define CONFIG_SYS_TEXT_BASE 0x4a000000
83 #define CONFIG_PRE_CON_BUF_ADDR 0x4f000000
84 /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
85 * since it needs to fit in with the other values. By also #defining it
86 * we get warnings if the Kconfig value mismatches. */
87 #define CONFIG_SPL_STACK_R_ADDR 0x4fe00000
88 #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000
91 #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */
93 #if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I)
95 * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
96 * slightly bigger. Note that it is possible to map the first 32 KiB of the
97 * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
98 * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
99 * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
101 #define CONFIG_SYS_INIT_RAM_ADDR 0x10000
102 #define CONFIG_SYS_INIT_RAM_SIZE 0x08000 /* FIXME: 40 KiB ? */
104 #define CONFIG_SYS_INIT_RAM_ADDR 0x0
105 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
108 #define CONFIG_SYS_INIT_SP_OFFSET \
109 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
110 #define CONFIG_SYS_INIT_SP_ADDR \
111 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
113 #define CONFIG_NR_DRAM_BANKS 1
114 #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
115 #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
118 #define CONFIG_LIBATA
119 #define CONFIG_SCSI_AHCI
120 #define CONFIG_SCSI_AHCI_PLAT
121 #define CONFIG_SUNXI_AHCI
122 #define CONFIG_SYS_64BIT_LBA
123 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
124 #define CONFIG_SYS_SCSI_MAX_LUN 1
125 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
126 CONFIG_SYS_SCSI_MAX_LUN)
130 #define CONFIG_SETUP_MEMORY_TAGS
131 #define CONFIG_CMDLINE_TAG
132 #define CONFIG_INITRD_TAG
133 #define CONFIG_SERIAL_TAG
135 #ifdef CONFIG_NAND_SUNXI
136 #define CONFIG_SYS_NAND_MAX_ECCPOS 1664
137 #define CONFIG_SYS_NAND_ONFI_DETECTION
138 #define CONFIG_SYS_MAX_NAND_DEVICE 8
141 #ifdef CONFIG_SPL_SPI_SUNXI
142 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
147 #define CONFIG_GENERIC_MMC
148 #define CONFIG_MMC_SUNXI
149 #define CONFIG_MMC_SUNXI_SLOT 0
150 #define CONFIG_ENV_IS_IN_MMC
151 #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */
154 /* 64MB of malloc() pool */
155 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20))
158 * Miscellaneous configurable options
160 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
161 #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
162 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
164 /* Boot Argument Buffer Size */
165 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
167 /* standalone support */
168 #define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR
171 #define CONFIG_BAUDRATE 115200
173 /* The stack sizes are set up in start.S using the settings below */
174 #define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */
176 /* FLASH and environment organization */
178 #define CONFIG_SYS_NO_FLASH
180 #define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */
181 #define CONFIG_IDENT_STRING " Allwinner Technology"
182 #define CONFIG_DISPLAY_BOARDINFO
184 #define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */
185 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
187 #define CONFIG_FAT_WRITE /* enable write access */
189 #define CONFIG_SPL_FRAMEWORK
191 #define CONFIG_SPL_BOARD_LOAD_IMAGE
193 #if defined(CONFIG_MACH_SUN9I)
194 #define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */
195 #define CONFIG_SPL_MAX_SIZE 0x5fc0 /* ? KiB on sun9i */
196 #elif defined(CONFIG_MACH_SUN50I)
197 #define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */
198 #define CONFIG_SPL_MAX_SIZE 0x7fc0 /* 32 KiB on sun50i */
200 #define CONFIG_SPL_TEXT_BASE 0x40 /* sram start+header */
201 #define CONFIG_SPL_MAX_SIZE 0x5fc0 /* 24KB on sun4i/sun7i */
205 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
208 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */
209 #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
211 #if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I)
212 /* FIXME: 40 KiB instead of 32 KiB ? */
213 #define LOW_LEVEL_SRAM_STACK 0x00018000
214 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
216 /* end of 32 KiB in sram */
217 #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
218 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
222 #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
223 defined CONFIG_SY8106A_POWER
226 #if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
227 defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
228 defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
229 #define CONFIG_SYS_I2C
230 #define CONFIG_SYS_I2C_MVTWSI
231 #define CONFIG_SYS_I2C_SPEED 400000
232 #define CONFIG_SYS_I2C_SLAVE 0x7f
235 #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
236 #define CONFIG_SYS_I2C_SOFT
237 #define CONFIG_SYS_I2C_SOFT_SPEED 50000
238 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x00
239 /* We use pin names in Kconfig and sunxi_name_to_gpio() */
240 #define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda
241 #define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl
243 extern int soft_i2c_gpio_sda;
244 extern int soft_i2c_gpio_scl;
246 #define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */
247 #define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */
249 #define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */
250 #define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */
254 #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
255 defined CONFIG_AXP221_POWER || defined CONFIG_AXP818_POWER || \
256 defined CONFIG_SY8106A_POWER
259 #ifndef CONFIG_CONS_INDEX
260 #define CONFIG_CONS_INDEX 1 /* UART0 */
263 #ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
264 #if CONFIG_CONS_INDEX == 1
265 #ifdef CONFIG_MACH_SUN9I
266 #define OF_STDOUT_PATH "/soc/serial@07000000:115200"
268 #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200"
270 #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
271 #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200"
272 #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
273 #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200"
274 #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
275 #define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200"
277 #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
279 #endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */
282 #define CONFIG_SUNXI_GPIO
286 * The amount of RAM to keep free at the top of RAM when relocating u-boot,
287 * to use as framebuffer. This must be a multiple of 4096.
289 #define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20)
291 /* Do we want to initialize a simple FB? */
292 #define CONFIG_VIDEO_DT_SIMPLEFB
294 #define CONFIG_VIDEO_SUNXI
296 #define CONFIG_CFB_CONSOLE
297 #define CONFIG_VIDEO_SW_CURSOR
298 #define CONFIG_VIDEO_LOGO
299 #define CONFIG_VIDEO_STD_TIMINGS
300 #define CONFIG_I2C_EDID
301 #define VIDEO_LINE_LEN (pGD->plnSizeX)
303 /* allow both serial and cfb console. */
304 #define CONFIG_CONSOLE_MUX
305 /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
306 #define CONFIG_VGA_AS_SINGLE_DEVICE
308 #endif /* CONFIG_VIDEO */
310 /* Ethernet support */
311 #ifdef CONFIG_SUNXI_EMAC
312 #define CONFIG_PHY_ADDR 1
313 #define CONFIG_MII /* MII PHY management */
314 #define CONFIG_PHYLIB
317 #ifdef CONFIG_SUNXI_GMAC
318 #define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */
319 #define CONFIG_PHY_ADDR 1
320 #define CONFIG_MII /* MII PHY management */
321 #define CONFIG_PHY_REALTEK
324 #ifdef CONFIG_USB_EHCI_HCD
325 #define CONFIG_USB_OHCI_NEW
326 #define CONFIG_USB_OHCI_SUNXI
327 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
328 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
331 #ifdef CONFIG_USB_MUSB_SUNXI
332 #define CONFIG_USB_MUSB_PIO_ONLY
335 #ifdef CONFIG_USB_MUSB_GADGET
336 #define CONFIG_USB_FUNCTION_DFU
337 #define CONFIG_USB_FUNCTION_FASTBOOT
338 #define CONFIG_USB_FUNCTION_MASS_STORAGE
341 #ifdef CONFIG_USB_FUNCTION_DFU
342 #define CONFIG_DFU_RAM
345 #ifdef CONFIG_USB_FUNCTION_FASTBOOT
346 #define CONFIG_CMD_FASTBOOT
347 #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
348 #define CONFIG_FASTBOOT_BUF_SIZE 0x2000000
349 #define CONFIG_ANDROID_BOOT_IMAGE
351 #define CONFIG_FASTBOOT_FLASH
354 #define CONFIG_FASTBOOT_FLASH_MMC_DEV 0
355 #define CONFIG_EFI_PARTITION
359 #ifdef CONFIG_USB_FUNCTION_MASS_STORAGE
362 #ifdef CONFIG_USB_KEYBOARD
363 #define CONFIG_CONSOLE_MUX
364 #define CONFIG_PREBOOT
365 #define CONFIG_SYS_STDIO_DEREGISTER
366 #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
369 #if !defined CONFIG_ENV_IS_IN_MMC && \
370 !defined CONFIG_ENV_IS_IN_NAND && \
371 !defined CONFIG_ENV_IS_IN_FAT && \
372 !defined CONFIG_ENV_IS_IN_SPI_FLASH
373 #define CONFIG_ENV_IS_NOWHERE
376 #define CONFIG_MISC_INIT_R
377 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
379 #ifndef CONFIG_SPL_BUILD
380 #include <config_distro_defaults.h>
382 /* Enable pre-console buffer to get complete log on the VGA console */
383 #define CONFIG_PRE_CONSOLE_BUFFER
384 #define CONFIG_PRE_CON_BUF_SZ 4096 /* Aprox 2 80*25 screens */
388 * Boards seem to come with at least 512MB of DRAM.
389 * The kernel should go at 512K, which is the default text offset (that will
390 * be adjusted at runtime if needed).
391 * There is no compression for arm64 kernels (yet), so leave some space
392 * for really big kernels, say 256MB for now.
393 * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
394 * Align the initrd to a 2MB page.
396 #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000))
397 #define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000))
398 #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000))
399 #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000))
400 #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FE00000))
404 * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
405 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
406 * 1M script, 1M pxe and the ramdisk at the end.
409 #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000))
410 #define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000))
411 #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000))
412 #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
413 #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000))
416 #define MEM_LAYOUT_ENV_SETTINGS \
417 "bootm_size=0xa000000\0" \
418 "kernel_addr_r=" KERNEL_ADDR_R "\0" \
419 "fdt_addr_r=" FDT_ADDR_R "\0" \
420 "scriptaddr=" SCRIPT_ADDR_R "\0" \
421 "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
422 "ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
424 #define DFU_ALT_INFO_RAM \
425 "dfu_alt_info_ram=" \
426 "kernel ram " KERNEL_ADDR_R " 0x1000000;" \
427 "fdt ram " FDT_ADDR_R " 0x100000;" \
428 "ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
431 #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
432 #if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
433 #define BOOT_TARGET_DEVICES_MMC_EXTRA(func) func(MMC, mmc, 1)
435 #define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
438 #define BOOT_TARGET_DEVICES_MMC(func)
439 #define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
443 #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
445 #define BOOT_TARGET_DEVICES_SCSI(func)
448 #ifdef CONFIG_USB_STORAGE
449 #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
451 #define BOOT_TARGET_DEVICES_USB(func)
454 /* FEL boot support, auto-execute boot.scr if a script address was provided */
455 #define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
457 "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
458 "echo '(FEL boot)'; " \
459 "source ${fel_scriptaddr}; " \
461 #define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
464 #define BOOT_TARGET_DEVICES(func) \
466 BOOT_TARGET_DEVICES_MMC(func) \
467 BOOT_TARGET_DEVICES_MMC_EXTRA(func) \
468 BOOT_TARGET_DEVICES_SCSI(func) \
469 BOOT_TARGET_DEVICES_USB(func) \
473 #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
474 #define BOOTCMD_SUNXI_COMPAT \
475 "bootcmd_sunxi_compat=" \
476 "setenv root /dev/mmcblk0p3 rootwait; " \
477 "if ext2load mmc 0 0x44000000 uEnv.txt; then " \
478 "echo Loaded environment from uEnv.txt; " \
479 "env import -t 0x44000000 ${filesize}; " \
481 "setenv bootargs console=${console} root=${root} ${extraargs}; " \
482 "ext2load mmc 0 0x43000000 script.bin && " \
483 "ext2load mmc 0 0x48000000 uImage && " \
486 #define BOOTCMD_SUNXI_COMPAT
489 #include <config_distro_bootcmd.h>
491 #ifdef CONFIG_USB_KEYBOARD
492 #define CONSOLE_STDIN_SETTINGS \
493 "preboot=usb start\0" \
494 "stdin=serial,usbkbd\0"
496 #define CONSOLE_STDIN_SETTINGS \
501 #define CONSOLE_STDOUT_SETTINGS \
502 "stdout=serial,vga\0" \
503 "stderr=serial,vga\0"
505 #define CONSOLE_STDOUT_SETTINGS \
510 #define CONSOLE_ENV_SETTINGS \
511 CONSOLE_STDIN_SETTINGS \
512 CONSOLE_STDOUT_SETTINGS
514 #define CONFIG_EXTRA_ENV_SETTINGS \
515 CONSOLE_ENV_SETTINGS \
516 MEM_LAYOUT_ENV_SETTINGS \
518 "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
519 "console=ttyS0,115200\0" \
520 BOOTCMD_SUNXI_COMPAT \
523 #else /* ifndef CONFIG_SPL_BUILD */
524 #define CONFIG_EXTRA_ENV_SETTINGS
527 #endif /* _SUNXI_COMMON_CONFIG_H */