2 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
4 * (C) Copyright 2007-2011
5 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
6 * Tom Cubie <tangliang@allwinnertech.com>
8 * Configuration settings for the Allwinner sunxi series of boards.
10 * SPDX-License-Identifier: GPL-2.0+
13 #ifndef _SUNXI_COMMON_CONFIG_H
14 #define _SUNXI_COMMON_CONFIG_H
16 #include <asm/arch/cpu.h>
17 #include <linux/stringify.h>
19 #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
21 * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
22 * expense of restricting some features, so the regular machine id values can
25 # define CONFIG_MACH_TYPE_COMPAT_REV 0
28 * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
29 * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
30 * beyond the machine id check.
32 # define CONFIG_MACH_TYPE_COMPAT_REV 1
36 * High Level Configuration Options
38 #define CONFIG_SUNXI /* sunxi family */
39 #ifdef CONFIG_SPL_BUILD
40 #define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */
43 /* Serial & console */
44 #define CONFIG_SYS_NS16550
45 #define CONFIG_SYS_NS16550_SERIAL
46 /* ns16550 reg in the low bits of cpu reg */
47 #define CONFIG_SYS_NS16550_CLK 24000000
48 #ifdef CONFIG_DM_SERIAL
49 # define CONFIG_DW_SERIAL
51 # define CONFIG_SYS_NS16550_REG_SIZE -4
52 # define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
53 # define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
54 # define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
55 # define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
56 # define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
60 #define CONFIG_DISPLAY_CPUINFO
61 #define CONFIG_SYS_CACHELINE_SIZE 64
64 * The DRAM Base differs between some models. We cannot use macros for the
65 * CONFIG_FOO defines which contain the DRAM base address since they end
66 * up unexpanded in include/autoconf.mk .
68 * So we have to have this #ifdef #else #endif block for these.
70 #ifdef CONFIG_MACH_SUN9I
71 #define SDRAM_OFFSET(x) 0x2##x
72 #define CONFIG_SYS_SDRAM_BASE 0x20000000
73 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */
74 #define CONFIG_SYS_TEXT_BASE 0x2a000000
75 #define CONFIG_PRE_CON_BUF_ADDR 0x2f000000
76 /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
77 * since it needs to fit in with the other values. By also #defining it
78 * we get warnings if the Kconfig value mismatches. */
79 #define CONFIG_SPL_STACK_R_ADDR 0x2fe00000
80 #define CONFIG_SYS_SPL_MALLOC_START 0x2ff00000
81 #define CONFIG_SPL_BSS_START_ADDR 0x2ff80000
83 #define SDRAM_OFFSET(x) 0x4##x
84 #define CONFIG_SYS_SDRAM_BASE 0x40000000
85 #define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */
86 #define CONFIG_SYS_TEXT_BASE 0x4a000000
87 #define CONFIG_PRE_CON_BUF_ADDR 0x4f000000
88 /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
89 * since it needs to fit in with the other values. By also #defining it
90 * we get warnings if the Kconfig value mismatches. */
91 #define CONFIG_SPL_STACK_R_ADDR 0x4fe00000
92 #define CONFIG_SYS_SPL_MALLOC_START 0x4ff00000
93 #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000
96 #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */
97 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */
99 #ifdef CONFIG_MACH_SUN9I
101 * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
102 * slightly bigger. Note that it is possible to map the first 32 KiB of the
103 * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
104 * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
105 * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
107 #define CONFIG_SYS_INIT_RAM_ADDR 0x10000
108 #define CONFIG_SYS_INIT_RAM_SIZE 0x0a000 /* 40 KiB */
110 #define CONFIG_SYS_INIT_RAM_ADDR 0x0
111 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
114 #define CONFIG_SYS_INIT_SP_OFFSET \
115 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
116 #define CONFIG_SYS_INIT_SP_ADDR \
117 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
119 #define CONFIG_NR_DRAM_BANKS 1
120 #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
121 #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
124 #define CONFIG_LIBATA
125 #define CONFIG_SCSI_AHCI
126 #define CONFIG_SCSI_AHCI_PLAT
127 #define CONFIG_SUNXI_AHCI
128 #define CONFIG_SYS_64BIT_LBA
129 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
130 #define CONFIG_SYS_SCSI_MAX_LUN 1
131 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
132 CONFIG_SYS_SCSI_MAX_LUN)
133 #define CONFIG_CMD_SCSI
136 #define CONFIG_SETUP_MEMORY_TAGS
137 #define CONFIG_CMDLINE_TAG
138 #define CONFIG_INITRD_TAG
139 #define CONFIG_SERIAL_TAG
141 #ifdef CONFIG_NAND_SUNXI
142 #define CONFIG_SPL_NAND_SUPPORT 1
146 #if !defined(CONFIG_UART0_PORT_F)
148 #define CONFIG_GENERIC_MMC
149 #define CONFIG_CMD_MMC
150 #define CONFIG_MMC_SUNXI
151 #define CONFIG_MMC_SUNXI_SLOT 0
152 #define CONFIG_ENV_IS_IN_MMC
153 #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */
156 /* 64MB of malloc() pool */
157 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20))
160 * Miscellaneous configurable options
162 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
163 #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
164 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
165 #define CONFIG_SYS_GENERIC_BOARD
167 /* Boot Argument Buffer Size */
168 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
170 /* standalone support */
171 #define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR
174 #define CONFIG_BAUDRATE 115200
176 /* The stack sizes are set up in start.S using the settings below */
177 #define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */
179 /* FLASH and environment organization */
181 #define CONFIG_SYS_NO_FLASH
183 #define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */
184 #define CONFIG_IDENT_STRING " Allwinner Technology"
186 #define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */
187 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
189 #define CONFIG_FAT_WRITE /* enable write access */
191 #define CONFIG_SPL_FRAMEWORK
192 #define CONFIG_SPL_LIBCOMMON_SUPPORT
193 #define CONFIG_SPL_SERIAL_SUPPORT
194 #define CONFIG_SPL_LIBGENERIC_SUPPORT
196 #define CONFIG_SPL_BOARD_LOAD_IMAGE
198 #define CONFIG_SPL_TEXT_BASE 0x20 /* sram start+header */
199 #define CONFIG_SPL_MAX_SIZE 0x5fe0 /* 24KB on sun4i/sun7i */
201 #define CONFIG_SPL_LIBDISK_SUPPORT
203 #if !defined(CONFIG_UART0_PORT_F)
204 #define CONFIG_SPL_MMC_SUPPORT
207 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
209 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80 /* 40KiB */
210 #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
212 /* end of 32 KiB in sram */
213 #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
214 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
217 #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER
218 #define CONFIG_SPL_I2C_SUPPORT
221 #if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
222 defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
223 defined CONFIG_I2C4_ENABLE
224 #define CONFIG_SYS_I2C
225 #define CONFIG_SYS_I2C_MVTWSI
226 #define CONFIG_SYS_I2C_SPEED 400000
227 #define CONFIG_SYS_I2C_SLAVE 0x7f
228 #define CONFIG_CMD_I2C
231 #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
232 #define CONFIG_SYS_I2C_SOFT
233 #define CONFIG_SYS_I2C_SOFT_SPEED 50000
234 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x00
235 /* We use pin names in Kconfig and sunxi_name_to_gpio() */
236 #define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda
237 #define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl
239 extern int soft_i2c_gpio_sda;
240 extern int soft_i2c_gpio_scl;
242 #define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */
243 #define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */
245 #define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */
246 #define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */
250 #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || defined CONFIG_AXP221_POWER
251 #define CONFIG_SPL_POWER_SUPPORT
254 #ifndef CONFIG_CONS_INDEX
255 #define CONFIG_CONS_INDEX 1 /* UART0 */
258 #ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
259 #if CONFIG_CONS_INDEX == 1
260 #ifdef CONFIG_MACH_SUN9I
261 #define OF_STDOUT_PATH "/soc/serial@07000000:115200"
263 #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200"
265 #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
266 #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200"
267 #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
268 #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200"
269 #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
270 #define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200"
272 #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
274 #endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */
277 #define CONFIG_SUNXI_GPIO
278 #define CONFIG_SPL_GPIO_SUPPORT
279 #define CONFIG_CMD_GPIO
283 * The amount of RAM to keep free at the top of RAM when relocating u-boot,
284 * to use as framebuffer. This must be a multiple of 4096.
286 #define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20)
288 /* Do we want to initialize a simple FB? */
289 #define CONFIG_VIDEO_DT_SIMPLEFB
291 #define CONFIG_VIDEO_SUNXI
293 #define CONFIG_CFB_CONSOLE
294 #define CONFIG_VIDEO_SW_CURSOR
295 #define CONFIG_VIDEO_LOGO
296 #define CONFIG_VIDEO_STD_TIMINGS
297 #define CONFIG_I2C_EDID
298 #define VIDEO_LINE_LEN (pGD->plnSizeX)
300 /* allow both serial and cfb console. */
301 #define CONFIG_CONSOLE_MUX
302 /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
303 #define CONFIG_VGA_AS_SINGLE_DEVICE
305 /* To be able to hook simplefb into dt */
306 #ifdef CONFIG_VIDEO_DT_SIMPLEFB
307 #define CONFIG_OF_BOARD_SETUP
310 #endif /* CONFIG_VIDEO */
312 /* Ethernet support */
313 #ifdef CONFIG_SUNXI_EMAC
314 #define CONFIG_PHY_ADDR 1
315 #define CONFIG_MII /* MII PHY management */
316 #define CONFIG_PHYLIB
319 #ifdef CONFIG_SUNXI_GMAC
320 #define CONFIG_DW_AUTONEG
321 #define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */
322 #define CONFIG_PHY_ADDR 1
323 #define CONFIG_MII /* MII PHY management */
324 #define CONFIG_PHYLIB
327 #ifdef CONFIG_USB_EHCI_HCD
328 #define CONFIG_USB_OHCI_NEW
329 #define CONFIG_USB_OHCI_SUNXI
330 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
331 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
334 #ifdef CONFIG_USB_MUSB_SUNXI
335 #define CONFIG_USB_MUSB_PIO_ONLY
338 #ifdef CONFIG_USB_MUSB_GADGET
339 #define CONFIG_USB_GADGET
340 #define CONFIG_USB_GADGET_DUALSPEED
341 #define CONFIG_USB_GADGET_VBUS_DRAW 0
343 #define CONFIG_USB_GADGET_DOWNLOAD
344 #define CONFIG_USB_FUNCTION_FASTBOOT
345 #define CONFIG_USB_FUNCTION_MASS_STORAGE
348 #ifdef CONFIG_USB_GADGET_DOWNLOAD
349 #define CONFIG_G_DNL_VENDOR_NUM 0x1f3a
350 #define CONFIG_G_DNL_PRODUCT_NUM 0x1010
351 #define CONFIG_G_DNL_MANUFACTURER "Allwinner Technology"
354 #ifdef CONFIG_USB_FUNCTION_FASTBOOT
355 #define CONFIG_CMD_FASTBOOT
356 #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
357 #define CONFIG_FASTBOOT_BUF_SIZE 0x2000000
359 #define CONFIG_FASTBOOT_FLASH
360 #define CONFIG_FASTBOOT_FLASH_MMC_DEV 0
361 #define CONFIG_EFI_PARTITION
364 #ifdef CONFIG_USB_FUNCTION_MASS_STORAGE
365 #define CONFIG_CMD_USB_MASS_STORAGE
368 #ifdef CONFIG_USB_KEYBOARD
369 #define CONFIG_CONSOLE_MUX
370 #define CONFIG_PREBOOT
371 #define CONFIG_SYS_STDIO_DEREGISTER
372 #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
375 #if !defined CONFIG_ENV_IS_IN_MMC && \
376 !defined CONFIG_ENV_IS_IN_NAND && \
377 !defined CONFIG_ENV_IS_IN_FAT && \
378 !defined CONFIG_ENV_IS_IN_SPI_FLASH
379 #define CONFIG_ENV_IS_NOWHERE
382 #define CONFIG_MISC_INIT_R
383 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
385 #ifndef CONFIG_SPL_BUILD
386 #include <config_distro_defaults.h>
388 /* Enable pre-console buffer to get complete log on the VGA console */
389 #define CONFIG_PRE_CONSOLE_BUFFER
390 #define CONFIG_PRE_CON_BUF_SZ 4096 /* Aprox 2 80*25 screens */
393 * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
394 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
395 * 1M script, 1M pxe and the ramdisk at the end.
397 #define MEM_LAYOUT_ENV_SETTINGS \
398 "bootm_size=0xa000000\0" \
399 "kernel_addr_r=" __stringify(SDRAM_OFFSET(2000000)) "\0" \
400 "fdt_addr_r=" __stringify(SDRAM_OFFSET(3000000)) "\0" \
401 "scriptaddr=" __stringify(SDRAM_OFFSET(3100000)) "\0" \
402 "pxefile_addr_r=" __stringify(SDRAM_OFFSET(3200000)) "\0" \
403 "ramdisk_addr_r=" __stringify(SDRAM_OFFSET(3300000)) "\0"
406 #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
408 #define BOOT_TARGET_DEVICES_MMC(func)
412 #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
414 #define BOOT_TARGET_DEVICES_SCSI(func)
417 #ifdef CONFIG_USB_STORAGE
418 #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
420 #define BOOT_TARGET_DEVICES_USB(func)
423 /* FEL boot support, auto-execute boot.scr if a script address was provided */
424 #define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
426 "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
427 "echo '(FEL boot)'; " \
428 "source ${fel_scriptaddr}; " \
430 #define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
433 #define BOOT_TARGET_DEVICES(func) \
435 BOOT_TARGET_DEVICES_MMC(func) \
436 BOOT_TARGET_DEVICES_SCSI(func) \
437 BOOT_TARGET_DEVICES_USB(func) \
441 #include <config_distro_bootcmd.h>
443 #ifdef CONFIG_USB_KEYBOARD
444 #define CONSOLE_STDIN_SETTINGS \
445 "preboot=usb start\0" \
446 "stdin=serial,usbkbd\0"
448 #define CONSOLE_STDIN_SETTINGS \
453 #define CONSOLE_STDOUT_SETTINGS \
454 "stdout=serial,vga\0" \
455 "stderr=serial,vga\0"
457 #define CONSOLE_STDOUT_SETTINGS \
462 #define CONSOLE_ENV_SETTINGS \
463 CONSOLE_STDIN_SETTINGS \
464 CONSOLE_STDOUT_SETTINGS
466 #define CONFIG_EXTRA_ENV_SETTINGS \
467 CONSOLE_ENV_SETTINGS \
468 MEM_LAYOUT_ENV_SETTINGS \
469 "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
470 "console=ttyS0,115200\0" \
473 #else /* ifndef CONFIG_SPL_BUILD */
474 #define CONFIG_EXTRA_ENV_SETTINGS
477 #endif /* _SUNXI_COMMON_CONFIG_H */