include/configs/stv0991.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright (C) 2014, STMicroelectronics - All Rights Reserved
   4  * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
   5  */
   6
   7 #ifndef __CONFIG_STV0991_H
   8 #define __CONFIG_STV0991_H
   9 #define CONFIG_SYS_DCACHE_OFF
  10 #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
  11
  12 /* ram memory-related information */
  13 #define PHYS_SDRAM_1                            0x00000000
  14 #define CONFIG_SYS_SDRAM_BASE                   PHYS_SDRAM_1
  15 #define PHYS_SDRAM_1_SIZE                       0x00198000
  16
  17 #define CONFIG_ENV_SIZE                         0x10000
  18 #define CONFIG_ENV_SECT_SIZE                    CONFIG_ENV_SIZE
  19 #define CONFIG_ENV_OFFSET                       0x30000
  20 #define CONFIG_ENV_ADDR                         \
  21         (PHYS_SDRAM_1_SIZE - CONFIG_ENV_SIZE)
  22 #define CONFIG_SYS_MALLOC_LEN                   (CONFIG_ENV_SIZE + 16 * 1024)
  23
  24 /* user interface */
  25 #define CONFIG_SYS_CBSIZE                       1024
  26
  27 /* MISC */
  28 #define CONFIG_SYS_LOAD_ADDR                    0x00000000
  29 #define CONFIG_SYS_INIT_RAM_SIZE                0x8000
  30 #define CONFIG_SYS_INIT_RAM_ADDR                0x00190000
  31 #define CONFIG_SYS_INIT_SP_OFFSET               \
  32         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  33 /* U-Boot Load Address */
  34 #define CONFIG_SYS_INIT_SP_ADDR                 \
  35         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  36
  37 /* GMAC related configs */
  38
  39 #define CONFIG_DW_ALTDESCRIPTOR
  40
  41 /* Command support defines */
  42 #define CONFIG_PHY_RESET_DELAY                  10000           /* in usec */
  43
  44 #define CONFIG_SYS_MEMTEST_START               0x0000
  45 #define CONFIG_SYS_MEMTEST_END                 1024*1024
  46
  47 /* Misc configuration */
  48
  49 #define CONFIG_BOOTCOMMAND                     "go 0x40040000"
  50
  51 /*
  52 + * QSPI support
  53 + */
  54 #ifdef CONFIG_OF_CONTROL                /* QSPI is controlled via DT */
  55 #define CONFIG_CQSPI_REF_CLK            ((30/4)/2)*1000*1000
  56
  57 #endif
  58
  59 #endif /* __CONFIG_H */