1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2017-2019 A. Karas, SomLabs
4 * Copyright (C) 2015-2016 Freescale Semiconductor, Inc.
6 * Configuration settings for the SoMlabs VisionSOM 6ULL board.
8 #ifndef __SOMLABS_VISIONSOM_6ULL_H
9 #define __SOMLABS_VISIONSOM_6ULL_H
11 #include <asm/arch/imx-regs.h>
12 #include <linux/sizes.h>
13 #include "mx6_common.h"
14 #include <asm/mach-imx/gpio.h>
19 /* Size of malloc() pool */
20 #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
22 #define CONFIG_MXC_UART
23 #define CONFIG_MXC_UART_BASE UART1_BASE
26 #ifdef CONFIG_FSL_USDHC
27 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
29 #define CONFIG_SYS_FSL_USDHC_NUM 1
30 #endif /* CONFIG_FSL_USDHC */
32 #define CONFIG_CMD_READ
34 #define CONFIG_EXTRA_ENV_SETTINGS \
35 "bootm_size=0x10000000\0" \
37 "initrd_addr=0x86800000\0" \
38 "fdt_addr=0x83000000\0" \
41 "splashimage=0x80000000\0" \
42 "splashfile=/boot/splash.bmp\0" \
45 "mmcroot=/dev/mmcblk1p1 rootwait rw\0" \
46 "setrootmmc=setenv rootspec root=${mmcroot}\0" \
47 "setbootscriptmmc=setenv loadbootscript " \
48 "load mmc ${mmcdev}:${mmcpart} " \
49 "${loadaddr} /boot/${script};\0" \
50 "setloadmmc=setenv loadimage load mmc ${mmcdev}:${mmcpart} " \
51 "${loadaddr} /boot/${image}; " \
52 "setenv loadfdt load mmc ${mmcdev}:${mmcpart} " \
53 "${fdt_addr} /boot/${fdt_file};\0" \
54 "setbootargs=setenv bootargs console=${console},${baudrate} " \
56 "execbootscript=echo Running bootscript...; source\0" \
57 "setfdtfile=setenv fdt_file somlabs-visionsom-6ull.dtb\0" \
58 "checkbootdev=run setbootscriptmmc; " \
62 #define CONFIG_BOOTCOMMAND \
64 "run checkbootdev; " \
66 "if run loadbootscript; then " \
69 "if run loadimage; then " \
71 "bootz ${loadaddr} - ${fdt_addr}; " \
75 /* Miscellaneous configurable options */
77 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
78 #define CONFIG_SYS_HZ 1000
80 /* Physical Memory Map */
81 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
83 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
84 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
85 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
87 #define CONFIG_SYS_INIT_SP_OFFSET \
88 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
89 #define CONFIG_SYS_INIT_SP_ADDR \
90 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
92 /* environment organization */
93 #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
94 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
98 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
99 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
100 #define CONFIG_MXC_USB_FLAGS 0
101 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
104 #ifdef CONFIG_CMD_NET
105 #define CONFIG_FEC_MXC
106 #define IMX_FEC_BASE ENET_BASE_ADDR
107 #define CONFIG_FEC_MXC_PHYADDR 0x1
108 #define CONFIG_FEC_XCV_TYPE RMII
109 #define CONFIG_ETHPRIME "eth0"
112 #define CONFIG_IMX_THERMAL