2 * Copyright (C) 2014 Marek Vasut <marex@denx.de>
4 * SPDX-License-Identifier: GPL-2.0+
6 #ifndef __CONFIG_SOCFPGA_CYCLONE5_H__
7 #define __CONFIG_SOCFPGA_CYCLONE5_H__
9 #include <asm/arch/socfpga_base_addrs.h>
12 #define CONFIG_SYS_NO_FLASH
13 #define CONFIG_DOS_PARTITION
14 #define CONFIG_FAT_WRITE
15 #define CONFIG_HW_WATCHDOG
17 #define CONFIG_CMD_ASKENV
18 #define CONFIG_CMD_BOOTZ
19 #define CONFIG_CMD_CACHE
20 #define CONFIG_CMD_DFU
21 #define CONFIG_CMD_DHCP
22 #define CONFIG_CMD_EXT4
23 #define CONFIG_CMD_EXT4_WRITE
24 #define CONFIG_CMD_FAT
25 #define CONFIG_CMD_FS_GENERIC
26 #define CONFIG_CMD_GREPENV
27 #define CONFIG_CMD_MII
28 #define CONFIG_CMD_MMC
29 #define CONFIG_CMD_PING
30 #define CONFIG_CMD_USB
31 #define CONFIG_CMD_USB_MASS_STORAGE
34 /* Memory configurations */
35 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */
38 #define CONFIG_BOOTDELAY 3
39 #define CONFIG_BOOTFILE "zImage"
40 #define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
41 #ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
42 #define CONFIG_BOOTCOMMAND "run ramboot"
44 #define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot"
46 #define CONFIG_LOADADDR 0x01000000
47 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
49 /* Ethernet on SoC (EMAC) */
50 #if defined(CONFIG_CMD_NET)
53 #define CONFIG_PHY_MICREL
54 #define CONFIG_PHY_MICREL_KSZ9021
55 #define CONFIG_KSZ9021_CLK_SKEW_ENV "micrel-ksz9021-clk-skew"
56 #define CONFIG_KSZ9021_CLK_SKEW_VAL 0xf0f0
57 #define CONFIG_KSZ9021_DATA_SKEW_ENV "micrel-ksz9021-data-skew"
58 #define CONFIG_KSZ9021_DATA_SKEW_VAL 0x0
64 #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS
66 #define CONFIG_G_DNL_MANUFACTURER "Altera"
68 /* Extra Environment */
69 #define CONFIG_HOSTNAME socfpga_cyclone5
71 #define CONFIG_EXTRA_ENV_SETTINGS \
73 "loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
74 "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
75 "bootm ${loadaddr} - ${fdt_addr}\0" \
76 "bootimage=zImage\0" \
78 "fdtimage=socfpga.dtb\0" \
79 "fsloadcmd=ext2load\0" \
80 "bootm ${loadaddr} - ${fdt_addr}\0" \
81 "mmcroot=/dev/mmcblk0p2\0" \
82 "mmcboot=setenv bootargs " CONFIG_BOOTARGS \
83 " root=${mmcroot} rw rootwait;" \
84 "bootz ${loadaddr} - ${fdt_addr}\0" \
85 "mmcload=mmc rescan;" \
86 "load mmc 0:1 ${loadaddr} ${bootimage};" \
87 "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
88 "qspiroot=/dev/mtdblock0\0" \
89 "qspirootfstype=jffs2\0" \
90 "qspiboot=setenv bootargs " CONFIG_BOOTARGS \
91 " root=${qspiroot} rw rootfstype=${qspirootfstype};"\
92 "bootm ${loadaddr} - ${fdt_addr}\0"
94 /* The rest of the configuration is shared */
95 #include <configs/socfpga_common.h>
97 #endif /* __CONFIG_SOCFPGA_CYCLONE5_H__ */