3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 * Gary Jennejohn <garyj@denx.de>
6 * David Mueller <d.mueller@elsoft.ch>
8 * Configuation settings for the SAMSUNG SMDK2410 board.
10 * SPDX-License-Identifier: GPL-2.0+
17 * High Level Configuration Options
20 #define CONFIG_S3C24X0 /* This is a SAMSUNG S3C24x0-type SoC */
21 #define CONFIG_S3C2410 /* specifically a SAMSUNG S3C2410 SoC */
22 #define CONFIG_SMDK2410 /* on a SAMSUNG SMDK2410 Board */
24 #define CONFIG_SYS_TEXT_BASE 0x0
26 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
28 /* input clock of PLL (the SMDK2410 has 12MHz input clock) */
29 #define CONFIG_SYS_CLK_FREQ 12000000
31 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
32 #define CONFIG_SETUP_MEMORY_TAGS
33 #define CONFIG_INITRD_TAG
38 #define CONFIG_CS8900 /* we have a CS8900 on-board */
39 #define CONFIG_CS8900_BASE 0x19000300
40 #define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */
43 * select serial console configuration
45 #define CONFIG_S3C24X0_SERIAL
46 #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK2410 */
48 /************************************************************
49 * USB support (currently only works with D-cache off)
50 ************************************************************/
51 #define CONFIG_USB_OHCI
52 #define CONFIG_USB_OHCI_S3C24XX
53 #define CONFIG_DOS_PARTITION
55 /************************************************************
57 ************************************************************/
58 #define CONFIG_RTC_S3C24X0
60 #define CONFIG_BAUDRATE 115200
65 #define CONFIG_BOOTP_BOOTFILESIZE
66 #define CONFIG_BOOTP_BOOTPATH
67 #define CONFIG_BOOTP_GATEWAY
68 #define CONFIG_BOOTP_HOSTNAME
71 * Command line configuration.
73 #define CONFIG_CMD_BSP
74 #define CONFIG_CMD_DATE
75 #define CONFIG_CMD_NAND
76 #define CONFIG_CMD_REGINFO
78 #define CONFIG_CMDLINE_EDITING
81 #define CONFIG_BOOT_RETRY_TIME -1
82 #define CONFIG_RESET_TO_RETRY
84 #define CONFIG_NETMASK 255.255.255.0
85 #define CONFIG_IPADDR 10.0.0.110
86 #define CONFIG_SERVERIP 10.0.0.1
88 #if defined(CONFIG_CMD_KGDB)
89 #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
93 * Miscellaneous configurable options
95 #define CONFIG_SYS_LONGHELP /* undef to save memory */
96 #define CONFIG_SYS_CBSIZE 256
97 /* Print Buffer Size */
98 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
99 sizeof(CONFIG_SYS_PROMPT)+16)
100 #define CONFIG_SYS_MAXARGS 16
101 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
103 #define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */
104 #define CONFIG_SYS_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
106 #define CONFIG_SYS_LOAD_ADDR 0x30800000
108 /* support additional compression methods */
113 /*-----------------------------------------------------------------------
114 * Physical Memory Map
116 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
117 #define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
118 #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
120 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #0 */
122 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
124 /*-----------------------------------------------------------------------
125 * FLASH and environment organization
128 #define CONFIG_SYS_FLASH_CFI
129 #define CONFIG_FLASH_CFI_DRIVER
130 #define CONFIG_FLASH_CFI_LEGACY
131 #define CONFIG_SYS_FLASH_LEGACY_512Kx16
132 #define CONFIG_FLASH_SHOW_PROGRESS 45
134 #define CONFIG_SYS_MAX_FLASH_BANKS 1
135 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
136 #define CONFIG_SYS_MAX_FLASH_SECT (19)
138 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000)
139 #define CONFIG_ENV_IS_IN_FLASH
140 #define CONFIG_ENV_SIZE 0x10000
141 /* allow to overwrite serial and ethaddr */
142 #define CONFIG_ENV_OVERWRITE
145 * Size of malloc() pool
146 * BZIP2 / LZO / LZMA need a lot of RAM
148 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
150 #define CONFIG_SYS_MONITOR_LEN (448 * 1024)
151 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
156 #ifdef CONFIG_CMD_NAND
157 #define CONFIG_NAND_S3C2410
158 #define CONFIG_SYS_S3C2410_NAND_HWECC
159 #define CONFIG_SYS_MAX_NAND_DEVICE 1
160 #define CONFIG_SYS_NAND_BASE 0x4E000000
166 #define CONFIG_CMD_UBIFS
167 #define CONFIG_CMD_MTDPARTS
168 #define CONFIG_MTD_DEVICE
169 #define CONFIG_MTD_PARTITIONS
170 #define CONFIG_YAFFS2
171 #define CONFIG_RBTREE
173 /* additions for new relocation code, must be added to all boards */
174 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
175 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
176 GENERATED_GBL_DATA_SIZE)
178 #define CONFIG_BOARD_EARLY_INIT_F
180 #endif /* __CONFIG_H */