2 * Configuation settings for the sh7752evb board
4 * Copyright (C) 2012 Renesas Solutions Corp.
6 * SPDX-License-Identifier: GPL-2.0+
13 #define CONFIG_CPU_SH7752 1
14 #define CONFIG_SH7752EVB 1
16 #define CONFIG_SYS_TEXT_BASE 0x5ff80000
17 #define CONFIG_SYS_LDSCRIPT "board/renesas/sh7752evb/u-boot.lds"
19 #define CONFIG_CMD_DFL
20 #define CONFIG_CMD_SDRAM
21 #define CONFIG_CMD_MD5SUM
23 #define CONFIG_DOS_PARTITION
24 #define CONFIG_MAC_PARTITION
26 #define CONFIG_BAUDRATE 115200
27 #define CONFIG_BOOTDELAY 3
28 #define CONFIG_BOOTARGS "console=ttySC2,115200 root=/dev/nfs ip=dhcp"
30 #define CONFIG_VERSION_VARIABLE
31 #undef CONFIG_SHOW_BOOT_PROGRESS
32 #define CONFIG_CMDLINE_EDITING
33 #define CONFIG_AUTO_COMPLETE
36 #define SH7752EVB_SDRAM_BASE (0x40000000)
37 #define SH7752EVB_SDRAM_SIZE (512 * 1024 * 1024)
39 #define CONFIG_SYS_LONGHELP
40 #define CONFIG_SYS_CBSIZE 256
41 #define CONFIG_SYS_PBSIZE 256
42 #define CONFIG_SYS_MAXARGS 16
43 #define CONFIG_SYS_BARGSIZE 512
44 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
47 #define CONFIG_SCIF_CONSOLE 1
48 #define CONFIG_CONS_SCIF2 1
49 #undef CONFIG_SYS_CONSOLE_INFO_QUIET
50 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
51 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
53 #define CONFIG_SYS_MEMTEST_START (SH7752EVB_SDRAM_BASE)
54 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
56 #undef CONFIG_SYS_ALT_MEMTEST
57 #undef CONFIG_SYS_MEMTEST_SCRATCH
58 #undef CONFIG_SYS_LOADS_BAUD_CHANGE
60 #define CONFIG_SYS_SDRAM_BASE (SH7752EVB_SDRAM_BASE)
61 #define CONFIG_SYS_SDRAM_SIZE (SH7752EVB_SDRAM_SIZE)
62 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \
65 #define CONFIG_SYS_MONITOR_BASE 0x00000000
66 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
67 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
68 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
71 #define CONFIG_SYS_NO_FLASH
74 #define CONFIG_SH_ETHER 1
75 #define CONFIG_SH_ETHER_USE_PORT 0
76 #define CONFIG_SH_ETHER_PHY_ADDR 18
77 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 1
78 #define CONFIG_SH_ETHER_USE_GETHER 1
80 #define CONFIG_BITBANGMII
81 #define CONFIG_BITBANGMII_MULTI
82 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII
83 #define CONFIG_PHY_VITESSE
85 #define SH7752EVB_ETHERNET_MAC_BASE_SPI 0x00090000
86 #define SH7752EVB_SPI_SECTOR_SIZE (64 * 1024)
87 #define SH7752EVB_ETHERNET_MAC_BASE SH7752EVB_ETHERNET_MAC_BASE_SPI
88 #define SH7752EVB_ETHERNET_MAC_SIZE 17
89 #define SH7752EVB_ETHERNET_NUM_CH 2
90 #define CONFIG_BOARD_LATE_INIT
93 #define CONFIG_SH_SPI 1
94 #define CONFIG_SH_SPI_BASE 0xfe002000
98 #define CONFIG_GENERIC_MMC 1
99 #define CONFIG_SH_MMCIF 1
100 #define CONFIG_SH_MMCIF_ADDR 0xffcb0000
101 #define CONFIG_SH_MMCIF_CLK 48000000
104 #define CONFIG_ENV_IS_EMBEDDED
105 #define CONFIG_ENV_IS_IN_SPI_FLASH
106 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
107 #define CONFIG_ENV_ADDR (0x00080000)
108 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR)
109 #define CONFIG_ENV_OVERWRITE 1
110 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
111 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
112 #define CONFIG_EXTRA_ENV_SETTINGS \
113 "netboot=bootp; bootm\0"
116 #define CONFIG_SYS_CLK_FREQ 48000000
117 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
118 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
119 #define CONFIG_SYS_TMU_CLK_DIV 4
120 #endif /* __SH7752EVB_H */