3 * Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * board/config.h - configuration options, board specific
31 #define CONFIG_SKIP_RELOCATE_UBOOT
35 * High Level Configuration Options
39 #define CONFIG_X86 1 /* This is a X86 CPU */
40 #define CONFIG_SYS_SC520 1 /* Include support for AMD SC520 */
41 #define CONFIG_ALI152X 1 /* Include support for Ali 152x SIO */
43 #define CONFIG_SYS_SDRAM_PRECHARGE_DELAY 6 /* 6T */
44 #define CONFIG_SYS_SDRAM_REFRESH_RATE 78 /* 7.8uS (choices are 7.8, 15.6, 31.2 or 62.5uS) */
45 #define CONFIG_SYS_SDRAM_RAS_CAS_DELAY 3 /* 3T */
47 /* define at most one of these */
48 #undef CONFIG_SYS_SDRAM_CAS_LATENCY_2T
49 #define CONFIG_SYS_SDRAM_CAS_LATENCY_3T
51 #define CONFIG_SYS_SC520_HIGH_SPEED 0 /* 100 or 133MHz */
52 #undef CONFIG_SYS_SC520_RESET /* use SC520 MMCR's to reset cpu */
53 #undef CONFIG_SYS_SC520_TIMER /* use SC520 swtimers */
54 #define CONFIG_SYS_GENERIC_TIMER 1 /* use the i8254 PIT timers */
55 #undef CONFIG_SYS_TSC_TIMER /* use the Pentium TSC timers */
56 #define CONFIG_SYS_USE_SIO_UART 0 /* prefer the uarts on the SIO to those
57 * in the SC520 on the CDP */
58 #define CONFIG_SYS_PCAT_INTERRUPTS
59 #define CONFIG_SYS_NUM_IRQS 16
61 #define CONFIG_SYS_STACK_SIZE 0x8000 /* Size of bootloader stack */
63 #define CONFIG_SHOW_BOOT_PROGRESS 1
64 #define CONFIG_LAST_STAGE_INIT 1
67 * Size of malloc() pool
69 #define CONFIG_MALLOC_SIZE (CONFIG_ENV_SIZE + 128*1024)
71 #define CONFIG_BAUDRATE 9600
76 #define CONFIG_BOOTP_BOOTFILESIZE
77 #define CONFIG_BOOTP_BOOTPATH
78 #define CONFIG_BOOTP_GATEWAY
79 #define CONFIG_BOOTP_HOSTNAME
83 * Command line configuration.
85 #include <config_cmd_default.h>
87 #define CONFIG_CMD_PCI
89 #define CONFIG_CMD_SATA
91 #undef CONFIG_CMD_SATA
93 #define CONFIG_CMD_JFFS2
94 #define CONFIG_CMD_NET
95 #define CONFIG_CMD_EEPROM
97 #define CONFIG_BOOTDELAY 15
98 #define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyS0,9600"
99 /* #define CONFIG_BOOTCOMMAND "bootm 38000000" */
101 #if defined(CONFIG_CMD_KGDB)
102 #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
103 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
107 * Miscellaneous configurable options
109 #define CONFIG_SYS_LONGHELP /* undef to save memory */
110 #define CONFIG_SYS_PROMPT "boot > " /* Monitor Command Prompt */
111 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
112 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
113 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
114 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
116 #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
117 #define CONFIG_SYS_MEMTEST_END 0x01000000 /* 1 ... 16 MB in DRAM */
119 #undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
121 #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
123 #define CONFIG_SYS_HZ 1024 /* incrementer freq: 1kHz */
125 /* valid baudrates */
126 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
128 /*-----------------------------------------------------------------------
129 * Physical Memory Map
131 #define CONFIG_NR_DRAM_BANKS 4 /* we have 4 banks of DRAM */
133 /*-----------------------------------------------------------------------
134 * FLASH and environment organization
136 #define CONFIG_SYS_MAX_FLASH_BANKS 3 /* max number of memory banks */
137 #define CONFIG_SYS_MAX_FLASH_SECT 64 /* max number of sectors on one chip */
139 /* timeout values are in ticks */
140 #define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
141 #define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
143 #define CONFIG_SPI_EEPROM /* Support for SPI EEPROMs (AT25128) */
144 #define CONFIG_MW_EEPROM /* Support for MicroWire EEPROMs (AT93LC46) */
146 /* allow to overwrite serial and ethaddr */
147 #define CONFIG_ENV_OVERWRITE
149 /* Environment in EEPROM */
150 #define CONFIG_ENV_IS_IN_EEPROM 1
152 #define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment EEPROM 16k is SPI is used or 128 bytes if MW is used*/
153 #define CONFIG_ENV_OFFSET 0
154 #define CONFIG_SYS_SC520_CDP_USE_SPI /* Store configuration in the SPI part */
155 #undef CONFIG_SYS_SC520_CDP_USE_MW /* Store configuration in the MicroWire part */
156 #define CONFIG_SPI_X 1
161 /* No command line, one static partition, whole device */
162 #undef CONFIG_CMD_MTDPARTS
163 #define CONFIG_JFFS2_DEV "nor0"
164 #define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
165 #define CONFIG_JFFS2_PART_OFFSET 0x00000000
167 /* mtdparts command line support */
169 #define CONFIG_CMD_MTDPARTS
170 #define MTDIDS_DEFAULT "nor0=SC520CDP Flash Bank #0"
171 #define MTDPARTS_DEFAULT "mtdparts=SC520CDP Flash Bank #0:-(jffs2)"
174 /*-----------------------------------------------------------------------
177 #define CONFIG_NET_MULTI /* Multi ethernet cards support */
179 #define CONFIG_PCNET_79C973
180 #define CONFIG_PCNET_79C975
181 #define PCNET_HAS_PROM 1
183 /************************************************************
185 ************************************************************/
186 #ifndef GRUSS_TESTING
187 #define CONFIG_SYS_SATA_MAXBUS 2 /*Max Sata buses supported */
188 #define CONFIG_SYS_SATA_DEVS_PER_BUS 2 /*Max no. of devices per bus/port */
189 #define CONFIG_SYS_SATA_MAX_DEVICE (CONFIG_SYS_SATA_MAXBUS* CONFIG_SYS_SATA_DEVS_PER_BUS)
190 #define CONFIG_ATA_PIIX 1 /*Supports ata_piix driver */
192 #undef CONFIG_SYS_SATA_MAXBUS
193 #undef CONFIG_SYS_SATA_DEVS_PER_BUS
194 #undef CONFIG_SYS_SATA_MAX_DEVICE
195 #undef CONFIG_ATA_PIIX
199 /************************************************************
200 * DISK Partition support
201 ************************************************************/
202 #define CONFIG_DOS_PARTITION
203 #define CONFIG_MAC_PARTITION
204 #define CONFIG_ISO_PARTITION /* Experimental */
206 /************************************************************
207 * Video/Keyboard support
208 ************************************************************/
209 #ifndef GRUSS_TESTING
210 #define CONFIG_VIDEO /* To enable video controller support */
214 #define CONFIG_I8042_KBD
215 #define CONFIG_SYS_ISA_IO 0
217 /************************************************************
219 ***********************************************************/
220 #define CONFIG_RTC_MC146818
221 #undef CONFIG_WATCHDOG /* watchdog disabled */
226 #ifndef GRUSS_TESTING
227 #define CONFIG_PCI /* include pci support */
228 #define CONFIG_PCI_PNP /* pci plug-and-play */
229 #define CONFIG_PCI_SCAN_SHOW
231 #define CONFIG_SYS_FIRST_PCI_IRQ 10
232 #define CONFIG_SYS_SECOND_PCI_IRQ 9
233 #define CONFIG_SYS_THIRD_PCI_IRQ 11
234 #define CONFIG_SYS_FORTH_PCI_IRQ 15
237 #undef CONFIG_PCI_PNP
238 #undef CONFIG_PCI_SCAN_SHOW
242 #endif /* __CONFIG_H */