3 * Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * board/config.h - configuration options, board specific
33 * High Level Configuration Options
37 #define CONFIG_X86 1 /* This is a X86 CPU */
38 #define CONFIG_SC520 1 /* Include support for AMD SC520 */
39 #define CONFIG_ALI152X 1 /* Include support for Ali 152x SIO */
41 #define CONFIG_SYS_SDRAM_PRECHARGE_DELAY 6 /* 6T */
42 #define CONFIG_SYS_SDRAM_REFRESH_RATE 78 /* 7.8uS (choices are 7.8, 15.6, 31.2 or 62.5uS) */
43 #define CONFIG_SYS_SDRAM_RAS_CAS_DELAY 3 /* 3T */
45 /* define at most one of these */
46 #undef CONFIG_SYS_SDRAM_CAS_LATENCY_2T
47 #define CONFIG_SYS_SDRAM_CAS_LATENCY_3T
49 #define CONFIG_SYS_SC520_HIGH_SPEED 0 /* 100 or 133MHz */
50 #undef CONFIG_SYS_RESET_SC520 /* use SC520 MMCR's to reset cpu */
51 #undef CONFIG_SYS_TIMER_SC520 /* use SC520 swtimers */
52 #define CONFIG_SYS_TIMER_GENERIC 1 /* use the i8254 PIT timers */
53 #undef CONFIG_SYS_TIMER_TSC /* use the Pentium TSC timers */
54 #define CONFIG_SYS_USE_SIO_UART 0 /* prefer the uarts on the SIO to those
55 * in the SC520 on the CDP */
57 #define CONFIG_SYS_STACK_SIZE 0x8000 /* Size of bootloader stack */
59 #define CONFIG_SHOW_BOOT_PROGRESS 1
60 #define CONFIG_LAST_STAGE_INIT 1
63 * Size of malloc() pool
65 #define CONFIG_MALLOC_SIZE (CONFIG_ENV_SIZE + 128*1024)
67 #define CONFIG_BAUDRATE 9600
72 #define CONFIG_BOOTP_BOOTFILESIZE
73 #define CONFIG_BOOTP_BOOTPATH
74 #define CONFIG_BOOTP_GATEWAY
75 #define CONFIG_BOOTP_HOSTNAME
79 * Command line configuration.
81 #include <config_cmd_default.h>
83 #define CONFIG_CMD_PCI
85 #define CONFIG_CMD_SATA
87 #undef CONFIG_CMD_SATA
89 #define CONFIG_CMD_JFFS2
90 #define CONFIG_CMD_NET
91 #define CONFIG_CMD_EEPROM
93 #define CONFIG_BOOTDELAY 15
94 #define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyS0,9600"
95 /* #define CONFIG_BOOTCOMMAND "bootm 38000000" */
97 #if defined(CONFIG_CMD_KGDB)
98 #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
99 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
103 * Miscellaneous configurable options
105 #define CONFIG_SYS_LONGHELP /* undef to save memory */
106 #define CONFIG_SYS_PROMPT "boot > " /* Monitor Command Prompt */
107 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
108 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
109 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
110 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
112 #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
113 #define CONFIG_SYS_MEMTEST_END 0x01000000 /* 1 ... 16 MB in DRAM */
115 #undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
117 #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
119 #define CONFIG_SYS_HZ 1024 /* incrementer freq: 1kHz */
121 /* valid baudrates */
122 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
124 /*-----------------------------------------------------------------------
125 * Physical Memory Map
127 #define CONFIG_NR_DRAM_BANKS 4 /* we have 4 banks of DRAM */
129 /*-----------------------------------------------------------------------
130 * FLASH and environment organization
132 #define CONFIG_SYS_MAX_FLASH_BANKS 3 /* max number of memory banks */
133 #define CONFIG_SYS_MAX_FLASH_SECT 64 /* max number of sectors on one chip */
135 /* timeout values are in ticks */
136 #define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
137 #define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
139 #define CONFIG_SPI_EEPROM /* Support for SPI EEPROMs (AT25128) */
140 #define CONFIG_MW_EEPROM /* Support for MicroWire EEPROMs (AT93LC46) */
142 /* allow to overwrite serial and ethaddr */
143 #define CONFIG_ENV_OVERWRITE
145 /* Environment in EEPROM */
146 #define CONFIG_ENV_IS_IN_EEPROM 1
148 #define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment EEPROM 16k is SPI is used or 128 bytes if MW is used*/
149 #define CONFIG_ENV_OFFSET 0
150 #define CONFIG_SC520_CDP_USE_SPI /* Store configuration in the SPI part */
151 #undef CONFIG_SC520_CDP_USE_MW /* Store configuration in the MicroWire part */
152 #define CONFIG_SPI_X 1
157 /* No command line, one static partition, whole device */
158 #undef CONFIG_JFFS2_CMDLINE
159 #define CONFIG_JFFS2_DEV "nor0"
160 #define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
161 #define CONFIG_JFFS2_PART_OFFSET 0x00000000
163 /* mtdparts command line support */
165 #define CONFIG_JFFS2_CMDLINE
166 #define MTDIDS_DEFAULT "nor0=SC520CDP Flash Bank #0"
167 #define MTDPARTS_DEFAULT "mtdparts=SC520CDP Flash Bank #0:-(jffs2)"
170 /*-----------------------------------------------------------------------
173 #define CONFIG_NET_MULTI /* Multi ethernet cards support */
175 #define CONFIG_PCNET_79C973
176 #define CONFIG_PCNET_79C975
177 #define PCNET_HAS_PROM 1
179 /************************************************************
181 ************************************************************/
182 #ifndef GRUSS_TESTING
183 #define CONFIG_SYS_SATA_MAXBUS 2 /*Max Sata buses supported */
184 #define CONFIG_SYS_SATA_DEVS_PER_BUS 2 /*Max no. of devices per bus/port */
185 #define CONFIG_SYS_SATA_MAX_DEVICE (CONFIG_SYS_SATA_MAXBUS* CONFIG_SYS_SATA_DEVS_PER_BUS)
186 #define CONFIG_ATA_PIIX 1 /*Supports ata_piix driver */
188 #undef CONFIG_SYS_SATA_MAXBUS
189 #undef CONFIG_SYS_SATA_DEVS_PER_BUS
190 #undef CONFIG_SYS_SATA_MAX_DEVICE
191 #undef CONFIG_ATA_PIIX
195 /************************************************************
196 * DISK Partition support
197 ************************************************************/
198 #define CONFIG_DOS_PARTITION
199 #define CONFIG_MAC_PARTITION
200 #define CONFIG_ISO_PARTITION /* Experimental */
202 /************************************************************
203 * Video/Keyboard support
204 ************************************************************/
205 #ifndef GRUSS_TESTING
206 #define CONFIG_VIDEO /* To enable video controller support */
210 #define CONFIG_I8042_KBD
211 #define CONFIG_SYS_ISA_IO 0
213 /************************************************************
215 ***********************************************************/
216 #define CONFIG_RTC_MC146818
217 #undef CONFIG_WATCHDOG /* watchdog disabled */
222 #ifndef GRUSS_TESTING
223 #define CONFIG_PCI /* include pci support */
224 #define CONFIG_PCI_PNP /* pci plug-and-play */
225 #define CONFIG_PCI_SCAN_SHOW
227 #define CONFIG_SYS_FIRST_PCI_IRQ 10
228 #define CONFIG_SYS_SECOND_PCI_IRQ 9
229 #define CONFIG_SYS_THIRD_PCI_IRQ 11
230 #define CONFIG_SYS_FORTH_PCI_IRQ 15
233 #undef CONFIG_PCI_PNP
234 #undef CONFIG_PCI_SCAN_SHOW
238 #endif /* __CONFIG_H */