3 * Albin Tonnerre, Free Electrons <albin.tonnerre@free-electrons.com>
5 * Configuation settings for the Calao SBC35-A9G20 board
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 /* SoC type is defined in boards.cfg */
30 #include <asm/hardware.h>
31 #include <asm/sizes.h>
33 #if defined(CONFIG_SYS_USE_NANDFLASH)
34 #define CONFIG_ENV_IS_IN_NAND
36 #define CONFIG_ENV_IS_IN_EEPROM
39 #define MACH_TYPE_SBC35_A9G20 1848
40 #define CONFIG_MACH_TYPE MACH_TYPE_SBC35_A9G20
42 /* ARM asynchronous clock */
43 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
44 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12.000 MHz crystal */
45 #define CONFIG_SYS_HZ 1000
47 #define CONFIG_ARCH_CPU_INIT
48 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
50 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
51 #define CONFIG_SETUP_MEMORY_TAGS
52 #define CONFIG_INITRD_TAG
53 #define CONFIG_SKIP_LOWLEVEL_INIT
56 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
57 #define CONFIG_AT91_GPIO
60 #define CONFIG_ATMEL_USART
61 #define CONFIG_USART_BASE ATMEL_BASE_DBGU
62 #define CONFIG_USART_ID ATMEL_ID_SYS
63 #define CONFIG_BAUDRATE 115200
64 #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
66 #define CONFIG_BOOTDELAY 3
71 #define CONFIG_BOOTP_BOOTFILESIZE
72 #define CONFIG_BOOTP_BOOTPATH
73 #define CONFIG_BOOTP_GATEWAY
74 #define CONFIG_BOOTP_HOSTNAME
77 * Command line configuration.
79 #include <config_cmd_default.h>
81 #undef CONFIG_CMD_FPGA
83 #undef CONFIG_CMD_IMLS
84 #undef CONFIG_CMD_LOADS
85 #undef CONFIG_CMD_SOURCE
87 #define CONFIG_CMD_PING
88 #define CONFIG_CMD_DHCP
89 #define CONFIG_CMD_USB
92 #define CONFIG_NR_DRAM_BANKS 1
93 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
94 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 megs */
95 #define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM1 + 0x1000 - \
96 GENERATED_GBL_DATA_SIZE)
100 #define CONFIG_CMD_SPI
101 #define CONFIG_ATMEL_SPI
102 #define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
104 #define CONFIG_CMD_EEPROM
105 #define CONFIG_SPI_M95XXX
106 #define CONFIG_SYS_EEPROM_SIZE 0x10000
107 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5
110 #define CONFIG_CMD_DATE
111 #define CONFIG_RTC_M41T94
112 #define CONFIG_M41T94_SPI_BUS 0
113 #define CONFIG_M41T94_SPI_CS 0
116 #define CONFIG_CMD_NAND
117 #define CONFIG_NAND_ATMEL
118 #define CONFIG_SYS_MAX_NAND_DEVICE 1
119 #define CONFIG_SYS_NAND_BASE 0x40000000
120 #define CONFIG_SYS_NAND_DBW_8
121 /* our ALE is AD21 */
122 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
123 /* our CLE is AD22 */
124 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
125 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
126 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
128 /* NOR flash - no real flash on this board */
129 #define CONFIG_SYS_NO_FLASH 1
134 #define CONFIG_NET_RETRY_COUNT 20
135 #define CONFIG_RESET_PHY_R
136 #define CONFIG_MACB_SEARCH_PHY
139 #define CONFIG_USB_ATMEL
140 #define CONFIG_USB_OHCI_NEW
141 #define CONFIG_DOS_PARTITION
142 #define CONFIG_SYS_USB_OHCI_CPU_INIT
143 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */
144 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
145 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
146 #define CONFIG_USB_STORAGE
147 #define CONFIG_CMD_FAT
149 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
151 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
152 #define CONFIG_SYS_MEMTEST_END 0x23e00000
154 /* Env in EEPROM, bootstrap + u-boot in NAND*/
155 #ifdef CONFIG_ENV_IS_IN_EEPROM
156 #define CONFIG_ENV_OFFSET 0x20
157 #define CONFIG_ENV_SIZE 0x1000
160 /* Env, bootstrap and u-boot in NAND */
161 #ifdef CONFIG_ENV_IS_IN_NAND
162 #define CONFIG_ENV_OFFSET 0x60000
163 #define CONFIG_ENV_OFFSET_REDUND 0x80000
164 #define CONFIG_ENV_SIZE 0x20000
167 #define CONFIG_BOOTCOMMAND "nboot 0x21000000 0 400000"
168 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
169 "root=/dev/mtdblock1 " \
170 "mtdparts=atmel_nand:16M(kernel)ro," \
171 "120M(rootfs),-(other) " \
172 "rw rootfstype=jffs2"
175 #define CONFIG_SYS_PROMPT "U-Boot> "
176 #define CONFIG_SYS_CBSIZE 256
177 #define CONFIG_SYS_MAXARGS 16
178 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
179 #define CONFIG_SYS_LONGHELP 1
180 #define CONFIG_CMDLINE_EDITING 1
183 * Size of malloc() pool
185 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)
186 #define CONFIG_STACKSIZE (32 * 1024) /* regular stack */
188 #ifdef CONFIG_USE_IRQ
189 #error CONFIG_USE_IRQ not supported