sunxi: Add support for using MII phy-s with the GMAC nic
[oweals/u-boot.git] / include / configs / sama5d3xek.h
1 /*
2  * Configuation settings for the SAMA5D3xEK board.
3  *
4  * Copyright (C) 2012 - 2013 Atmel
5  *
6  * based on at91sam9m10g45ek.h by:
7  * Stelian Pop <stelian@popies.net>
8  * Lead Tech Design <www.leadtechdesign.com>
9  *
10  * SPDX-License-Identifier:     GPL-2.0+
11  */
12
13 #ifndef __CONFIG_H
14 #define __CONFIG_H
15
16 #include <asm/hardware.h>
17
18 #define CONFIG_SYS_TEXT_BASE            0x26f00000
19
20 /* ARM asynchronous clock */
21 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768
22 #define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
23
24 #define CONFIG_ARCH_CPU_INIT
25
26 #ifndef CONFIG_SPL_BUILD
27 #define CONFIG_SKIP_LOWLEVEL_INIT
28 #endif
29
30 #define CONFIG_BOARD_EARLY_INIT_F
31 #define CONFIG_DISPLAY_CPUINFO
32
33 #define CONFIG_CMD_BOOTZ
34 #define CONFIG_OF_LIBFDT                /* Device Tree support */
35
36 #define CONFIG_SYS_GENERIC_BOARD
37
38 /* general purpose I/O */
39 #define CONFIG_AT91_GPIO
40
41 /* serial console */
42 #define CONFIG_ATMEL_USART
43 #define CONFIG_USART_BASE               ATMEL_BASE_DBGU
44 #define CONFIG_USART_ID                 ATMEL_ID_DBGU
45
46 /*
47  * This needs to be defined for the OHCI code to work but it is defined as
48  * ATMEL_ID_UHPHS in the CPU specific header files.
49  */
50 #define ATMEL_ID_UHP                    ATMEL_ID_UHPHS
51
52 /*
53  * Specify the clock enable bit in the PMC_SCER register.
54  */
55 #define ATMEL_PMC_UHP                   AT91SAM926x_PMC_UHP
56
57 /* LCD */
58 #define CONFIG_LCD
59 #define LCD_BPP                         LCD_COLOR16
60 #define LCD_OUTPUT_BPP                  24
61 #define CONFIG_LCD_LOGO
62 #define CONFIG_LCD_INFO
63 #define CONFIG_LCD_INFO_BELOW_LOGO
64 #define CONFIG_SYS_WHITE_ON_BLACK
65 #define CONFIG_ATMEL_HLCD
66 #define CONFIG_ATMEL_LCD_RGB565
67 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
68
69 /* board specific (not enough SRAM) */
70 #define CONFIG_SAMA5D3_LCD_BASE         0x23E00000
71
72 #define CONFIG_BOOTDELAY                3
73
74 /*
75  * BOOTP options
76  */
77 #define CONFIG_BOOTP_BOOTFILESIZE
78 #define CONFIG_BOOTP_BOOTPATH
79 #define CONFIG_BOOTP_GATEWAY
80 #define CONFIG_BOOTP_HOSTNAME
81
82 /* No NOR flash */
83 #define CONFIG_SYS_NO_FLASH
84
85 /*
86  * Command line configuration.
87  */
88 #include <config_cmd_default.h>
89 #undef CONFIG_CMD_FPGA
90 #undef CONFIG_CMD_IMI
91 #undef CONFIG_CMD_LOADS
92 #define CONFIG_CMD_PING
93 #define CONFIG_CMD_DHCP
94
95 /* SDRAM */
96 #define CONFIG_NR_DRAM_BANKS            1
97 #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_DDRCS
98 #define CONFIG_SYS_SDRAM_SIZE           0x20000000
99
100 #ifdef CONFIG_SPL_BUILD
101 #define CONFIG_SYS_INIT_SP_ADDR         0x310000
102 #else
103 #define CONFIG_SYS_INIT_SP_ADDR \
104         (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
105 #endif
106
107 /* SerialFlash */
108 #define CONFIG_CMD_SF
109
110 #ifdef CONFIG_CMD_SF
111 #define CONFIG_ATMEL_SPI
112 #define CONFIG_SPI_FLASH
113 #define CONFIG_SPI_FLASH_ATMEL
114 #define CONFIG_SF_DEFAULT_SPEED         30000000
115 #endif
116
117 /* NAND flash */
118 #define CONFIG_CMD_NAND
119
120 #ifdef CONFIG_CMD_NAND
121 #define CONFIG_NAND_ATMEL
122 #define CONFIG_SYS_MAX_NAND_DEVICE      1
123 #define CONFIG_SYS_NAND_BASE            ATMEL_BASE_CS3
124 /* our ALE is AD21 */
125 #define CONFIG_SYS_NAND_MASK_ALE        (1 << 21)
126 /* our CLE is AD22 */
127 #define CONFIG_SYS_NAND_MASK_CLE        (1 << 22)
128 #define CONFIG_SYS_NAND_ONFI_DETECTION
129 /* PMECC & PMERRLOC */
130 #define CONFIG_ATMEL_NAND_HWECC
131 #define CONFIG_ATMEL_NAND_HW_PMECC
132 #define CONFIG_PMECC_CAP                4
133 #define CONFIG_PMECC_SECTOR_SIZE        512
134 #define CONFIG_CMD_NAND_TRIMFFS
135 #endif
136
137 /* Ethernet Hardware */
138 #define CONFIG_MACB
139 #define CONFIG_RMII
140 #define CONFIG_NET_RETRY_COUNT          20
141 #define CONFIG_MACB_SEARCH_PHY
142 #define CONFIG_RGMII
143 #define CONFIG_CMD_MII
144 #define CONFIG_PHYLIB
145 #define CONFIG_PHY_MICREL
146 #define CONFIG_PHY_MICREL_KSZ9021
147
148 /* MMC */
149 #define CONFIG_CMD_MMC
150
151 #ifdef CONFIG_CMD_MMC
152 #define CONFIG_MMC
153 #define CONFIG_GENERIC_MMC
154 #define CONFIG_GENERIC_ATMEL_MCI
155 #define ATMEL_BASE_MMCI                 ATMEL_BASE_MCI0
156 #endif
157
158 /* USB */
159 #define CONFIG_CMD_USB
160
161 #ifdef CONFIG_CMD_USB
162 #define CONFIG_USB_ATMEL
163 #define CONFIG_USB_ATMEL_CLK_SEL_UPLL
164 #define CONFIG_USB_OHCI_NEW
165 #define CONFIG_SYS_USB_OHCI_CPU_INIT
166 #define CONFIG_SYS_USB_OHCI_REGS_BASE           ATMEL_BASE_OHCI
167 #define CONFIG_SYS_USB_OHCI_SLOT_NAME           "sama5d3"
168 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      3
169 #define CONFIG_DOS_PARTITION
170 #define CONFIG_USB_STORAGE
171 #endif
172
173 /* USB device */
174 #define CONFIG_USB_GADGET
175 #define CONFIG_USB_GADGET_DUALSPEED
176 #define CONFIG_USB_GADGET_ATMEL_USBA
177 #define CONFIG_USB_ETHER
178 #define CONFIG_USB_ETH_RNDIS
179 #define CONFIG_USBNET_MANUFACTURER      "Atmel SAMA5D3xEK"
180
181 #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
182 #define CONFIG_CMD_FAT
183 #endif
184
185 #define CONFIG_SYS_LOAD_ADDR                    0x22000000 /* load address */
186
187 #ifdef CONFIG_SYS_USE_SERIALFLASH
188 /* bootstrap + u-boot + env + linux in serial flash */
189 #define CONFIG_ENV_IS_IN_SPI_FLASH
190 #define CONFIG_ENV_OFFSET       0x5000
191 #define CONFIG_ENV_SIZE         0x3000
192 #define CONFIG_ENV_SECT_SIZE    0x1000
193 #define CONFIG_BOOTCOMMAND      "sf probe 0; " \
194                                 "sf read 0x22000000 0x42000 0x300000; " \
195                                 "bootm 0x22000000"
196 #elif CONFIG_SYS_USE_NANDFLASH
197 /* bootstrap + u-boot + env in nandflash */
198 #define CONFIG_ENV_IS_IN_NAND
199 #define CONFIG_ENV_OFFSET               0xc0000
200 #define CONFIG_ENV_OFFSET_REDUND        0x100000
201 #define CONFIG_ENV_SIZE                 0x20000
202 #define CONFIG_BOOTCOMMAND      "nand read 0x21000000 0x180000 0x80000;" \
203                                 "nand read 0x22000000 0x200000 0x600000;" \
204                                 "bootm 0x22000000 - 0x21000000"
205 #elif CONFIG_SYS_USE_MMC
206 /* bootstrap + u-boot + env in sd card */
207 #define CONFIG_ENV_IS_IN_MMC
208 #define CONFIG_ENV_OFFSET       0x2000
209 #define CONFIG_ENV_SIZE         0x1000
210 #define CONFIG_BOOTCOMMAND      "fatload mmc 0:1 0x21000000 dtb; " \
211                                 "fatload mmc 0:1 0x22000000 uImage; " \
212                                 "bootm 0x22000000 - 0x21000000"
213 #define CONFIG_SYS_MMC_ENV_DEV  0
214 #else
215 #define CONFIG_ENV_IS_NOWHERE
216 #endif
217
218 #ifdef CONFIG_SYS_USE_MMC
219 #define CONFIG_BOOTARGS                                                 \
220         "console=ttyS0,115200 earlyprintk "                             \
221         "root=/dev/mmcblk0p2 rw rootwait"
222 #else
223 #define CONFIG_BOOTARGS                                                 \
224         "console=ttyS0,115200 earlyprintk "                             \
225         "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"          \
226         "256K(env),256k(evn_redundent),256k(spare),"                    \
227         "512k(dtb),6M(kernel)ro,-(rootfs) "                             \
228         "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
229 #endif
230
231 #define CONFIG_BAUDRATE                 115200
232
233 #define CONFIG_SYS_PROMPT               "U-Boot> "
234 #define CONFIG_SYS_CBSIZE               256
235 #define CONFIG_SYS_MAXARGS              16
236 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
237                                         sizeof(CONFIG_SYS_PROMPT) + 16)
238 #define CONFIG_SYS_LONGHELP
239 #define CONFIG_CMDLINE_EDITING
240 #define CONFIG_AUTO_COMPLETE
241 #define CONFIG_SYS_HUSH_PARSER
242
243 /* Size of malloc() pool */
244 #define CONFIG_SYS_MALLOC_LEN           (1024 * 1024)
245
246 /* SPL */
247 #define CONFIG_SPL
248 #define CONFIG_SPL_FRAMEWORK
249 #define CONFIG_SPL_TEXT_BASE            0x300000
250 #define CONFIG_SPL_MAX_SIZE             0x10000
251 #define CONFIG_SPL_BSS_START_ADDR       0x20000000
252 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
253 #define CONFIG_SYS_SPL_MALLOC_START     0x20080000
254 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x80000
255
256 #define CONFIG_SPL_LIBCOMMON_SUPPORT
257 #define CONFIG_SPL_LIBGENERIC_SUPPORT
258 #define CONFIG_SPL_GPIO_SUPPORT
259 #define CONFIG_SPL_SERIAL_SUPPORT
260
261 #define CONFIG_SPL_BOARD_INIT
262 #define CONFIG_SYS_MONITOR_LEN          (512 << 10)
263
264 #ifdef CONFIG_SYS_USE_MMC
265 #define CONFIG_SPL_LDSCRIPT             arch/arm/cpu/at91-common/u-boot-spl.lds
266 #define CONFIG_SPL_MMC_SUPPORT
267 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x400
268 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
269 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION    1
270 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME        "u-boot.img"
271 #define CONFIG_SPL_FAT_SUPPORT
272 #define CONFIG_SPL_LIBDISK_SUPPORT
273
274 #elif CONFIG_SYS_USE_NANDFLASH
275 #define CONFIG_SPL_NAND_SUPPORT
276 #define CONFIG_SPL_NAND_DRIVERS
277 #define CONFIG_SPL_NAND_BASE
278 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x40000
279 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
280 #define CONFIG_SYS_NAND_PAGE_SIZE       0x800
281 #define CONFIG_SYS_NAND_PAGE_COUNT      64
282 #define CONFIG_SYS_NAND_OOBSIZE         64
283 #define CONFIG_SYS_NAND_BLOCK_SIZE      0x20000
284 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0x0
285 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
286
287 #elif CONFIG_SYS_USE_SERIALFLASH
288 #define CONFIG_SPL_SPI_SUPPORT
289 #define CONFIG_SPL_SPI_FLASH_SUPPORT
290 #define CONFIG_SPL_SPI_LOAD
291 #define CONFIG_SPL_SPI_BUS              0
292 #define CONFIG_SPL_SPI_CS               0
293 #define CONFIG_SYS_SPI_U_BOOT_OFFS      0x8400
294
295 #endif
296
297 #endif