2 * (C) Copyright 2015 Google, Inc
4 * SPDX-License-Identifier: GPL-2.0+
7 #ifndef __CONFIG_RK3288_COMMON_H
8 #define __CONFIG_RK3288_COMMON_H
10 #include <asm/arch/hardware.h>
12 #define CONFIG_SYS_NO_FLASH
13 #define CONFIG_NR_DRAM_BANKS 1
14 #define CONFIG_ENV_SIZE 0x2000
15 #define CONFIG_SYS_MAXARGS 16
16 #define CONFIG_BAUDRATE 115200
17 #define CONFIG_SYS_MALLOC_LEN (32 << 20)
18 #define CONFIG_SYS_CBSIZE 1024
19 #define CONFIG_SYS_THUMB_BUILD
20 #define CONFIG_DISPLAY_BOARDINFO
22 #define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
23 #define CONFIG_SYS_TIMER_BASE 0xff810020 /* TIMER7 */
24 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
26 #define CONFIG_SPL_FRAMEWORK
27 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
28 #define CONFIG_SPL_LIBCOMMON_SUPPORT
29 #define CONFIG_SPL_LIBGENERIC_SUPPORT
30 #define CONFIG_SPL_SERIAL_SUPPORT
31 #define CONFIG_SYS_NS16550_MEM32
32 #define CONFIG_SPL_BOARD_INIT
34 #ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
35 /* Bootrom will load u-boot binary to 0x0 once return from SPL */
36 #define CONFIG_SYS_TEXT_BASE 0x00000000
38 #define CONFIG_SYS_TEXT_BASE 0x00100000
40 #define CONFIG_SYS_INIT_SP_ADDR 0x00100000
41 #define CONFIG_SYS_LOAD_ADDR 0x00800800
42 #define CONFIG_SPL_STACK 0xff718000
43 #define CONFIG_SPL_TEXT_BASE 0xff704004
45 #define CONFIG_SILENT_CONSOLE
46 #ifndef CONFIG_SPL_BUILD
47 # define CONFIG_SYS_CONSOLE_IS_IN_ENV
48 # define CONFIG_CONSOLE_MUX
53 #define CONFIG_GENERIC_MMC
55 #define CONFIG_BOUNCE_BUFFER
57 #define CONFIG_FAT_WRITE
58 #define CONFIG_PARTITION_UUIDS
59 #define CONFIG_CMD_PART
61 /* RAW SD card / eMMC locations. */
62 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256
63 #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
65 /* FAT sd card locations. */
66 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
67 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
69 #define CONFIG_SPL_PINCTRL_SUPPORT
70 #define CONFIG_SPL_RAM_SUPPORT
71 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
73 #define CONFIG_SYS_SDRAM_BASE 0
74 #define CONFIG_NR_DRAM_BANKS 1
75 #define SDRAM_BANK_SIZE (2UL << 30)
77 #define CONFIG_SPI_FLASH
79 #define CONFIG_SF_DEFAULT_SPEED 20000000
81 #ifndef CONFIG_SPL_BUILD
83 #define CONFIG_USB_GADGET
84 #define CONFIG_USB_GADGET_DUALSPEED
85 #define CONFIG_USB_GADGET_DWC2_OTG
86 #define CONFIG_ROCKCHIP_USB2_PHY
87 #define CONFIG_USB_GADGET_VBUS_DRAW 0
90 #define CONFIG_CMD_FASTBOOT
91 #define CONFIG_USB_FUNCTION_FASTBOOT
92 #define CONFIG_FASTBOOT_FLASH
93 #define CONFIG_FASTBOOT_FLASH_MMC_DEV 1 /* eMMC */
94 #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
95 #define CONFIG_FASTBOOT_BUF_SIZE 0x08000000
97 /* usb mass storage */
98 #define CONFIG_USB_FUNCTION_MASS_STORAGE
99 #define CONFIG_CMD_USB_MASS_STORAGE
101 #define CONFIG_USB_GADGET_DOWNLOAD
102 #define CONFIG_G_DNL_MANUFACTURER "Rockchip"
103 #define CONFIG_G_DNL_VENDOR_NUM 0x2207
104 #define CONFIG_G_DNL_PRODUCT_NUM 0x320a
106 /* Enable gpt partition table */
107 #define CONFIG_CMD_GPT
109 #include <config_distro_defaults.h>
111 #define ENV_MEM_LAYOUT_SETTINGS \
112 "scriptaddr=0x00000000\0" \
113 "pxefile_addr_r=0x00100000\0" \
114 "fdt_addr_r=0x01f00000\0" \
115 "kernel_addr_r=0x02000000\0" \
116 "ramdisk_addr_r=0x04000000\0"
118 #define CONFIG_RANDOM_UUID
119 #define PARTS_DEFAULT \
120 "uuid_disk=${uuid_gpt_disk};" \
121 "name=boot,start=8M,size=64M,bootable,uuid=${uuid_gpt_boot};" \
122 "name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \
124 /* First try to boot from SD (index 0), then eMMC (index 1 */
125 #define BOOT_TARGET_DEVICES(func) \
129 #include <config_distro_bootcmd.h>
131 /* Linux fails to load the fdt if it's loaded above 512M on a Rock 2 board, so
132 * limit the fdt reallocation to that */
133 #define CONFIG_EXTRA_ENV_SETTINGS \
134 "fdt_high=0x1fffffff\0" \
135 "initrd_high=0x1fffffff\0" \
136 "partitions=" PARTS_DEFAULT \
137 ENV_MEM_LAYOUT_SETTINGS \
138 ROCKCHIP_DEVICE_SETTINGS \