1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuation settings for the Renesas Solutions r0p7734 board
5 * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
11 #define CONFIG_CPU_SH7734 1
12 #define CONFIG_400MHZ_MODE 1
14 #define CONFIG_DISPLAY_BOARDINFO
15 #undef CONFIG_SHOW_BOOT_PROGRESS
18 #define CONFIG_SH_ETHER_USE_PORT (0)
19 #define CONFIG_SH_ETHER_PHY_ADDR (0x0)
20 #define CONFIG_PHY_SMSC 1
21 #define CONFIG_BITBANGMII
22 #define CONFIG_BITBANGMII_MULTI
23 #define CONFIG_SH_ETHER_SH7734_MII (0x00) /* MII */
24 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
26 /* undef to save memory */
27 /* List of legal baudrate settings for this board */
28 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
32 #define CONFIG_CONS_SCIF3 1
34 /* Suppress display of console information at boot */
37 #define CONFIG_SYS_SDRAM_BASE (0x88000000)
38 #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024)
39 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
41 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
42 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 100 * 1024 * 1024)
43 /* Enable alternate, more extensive, memory test */
44 /* Scratch address used by the alternate memory test */
45 #undef CONFIG_SYS_MEMTEST_SCRATCH
47 /* Enable temporary baudrate change while serial download */
48 #undef CONFIG_SYS_LOADS_BAUD_CHANGE
51 #define CONFIG_FLASH_CFI_DRIVER 1
52 #define CONFIG_SYS_FLASH_CFI
53 #undef CONFIG_SYS_FLASH_QUIET_TEST
54 #define CONFIG_SYS_FLASH_EMPTY_INFO
55 #define CONFIG_SYS_FLASH_BASE (0xA0000000)
56 #define CONFIG_SYS_MAX_FLASH_SECT 512
58 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */
59 #define CONFIG_SYS_MAX_FLASH_BANKS 1
60 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
62 /* Timeout for Flash erase operations (in ms) */
63 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
64 /* Timeout for Flash write operations (in ms) */
65 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
66 /* Timeout for Flash set sector lock bit operations (in ms) */
67 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
68 /* Timeout for Flash clear lock bit operations (in ms) */
69 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
72 * Use hardware flash sectors protection instead
73 * of U-Boot software protection
75 #undef CONFIG_SYS_FLASH_PROTECTION
76 #undef CONFIG_SYS_DIRECT_FLASH_TFTP
78 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
79 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
81 #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
82 /* Size of DRAM reserved for malloc() use */
83 #define CONFIG_SYS_MALLOC_LEN (256 * 1024)
84 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
87 #define CONFIG_ENV_OVERWRITE 1
88 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
89 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
90 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
91 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
92 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
93 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
96 #if defined(CONFIG_400MHZ_MODE)
97 #define CONFIG_SYS_CLK_FREQ 50000000
99 #define CONFIG_SYS_CLK_FREQ 44444444
101 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
102 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
103 #define CONFIG_SYS_TMU_CLK_DIV 4
105 #endif /* __R0P7734_H */