2 * Copyright (C) 2009, Ilya Yanok, Emcraft Systems, <yanok@emcraft.com>
4 * Configuration settings for the Dave/DENX QongEVB-LITE board.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #include <asm/arch/mx31-regs.h>
27 /* High Level Configuration Options */
28 #define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
29 #define CONFIG_MX31 1 /* in a mx31 */
31 #define CONFIG_MX31_HCLK_FREQ 26000000 /* 26MHz */
32 #define CONFIG_MX31_CLK32 32768
34 #define CONFIG_DISPLAY_CPUINFO
35 #define CONFIG_DISPLAY_BOARDINFO
37 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
38 #define CONFIG_SETUP_MEMORY_TAGS 1
39 #define CONFIG_INITRD_TAG 1
42 * Size of malloc() pool
44 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
45 /* size in bytes reserved for initial data */
46 #define CONFIG_SYS_GBL_DATA_SIZE 128
52 #define CONFIG_MXC_UART 1
53 #define CONFIG_SYS_MX31_UART1 1
55 #define CONFIG_MX31_GPIO
58 #define CONFIG_QONG_FPGA 1
59 #define CONFIG_FPGA_BASE (CS1_BASE)
61 #ifdef CONFIG_QONG_FPGA
64 #define CONFIG_DNET_BASE (CS1_BASE + QONG_FPGA_PERIPH_SIZE)
65 #define CONFIG_NET_MULTI 1
68 * Reducing the ARP timeout from default 5 seconds to 200ms we speed up the
69 * initial TFTP transfer, should the user wish one, significantly.
71 #define CONFIG_ARP_TIMEOUT 200UL
73 #endif /* CONFIG_QONG_FPGA */
75 #define CONFIG_CONS_INDEX 1
76 #define CONFIG_BAUDRATE 115200
77 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
79 /***********************************************************
81 ***********************************************************/
83 #include <config_cmd_default.h>
85 #define CONFIG_CMD_PING
86 #define CONFIG_CMD_DHCP
87 #define CONFIG_CMD_NET
88 #define CONFIG_CMD_MII
89 #define CONFIG_CMD_NAND
92 * You can compile in a MAC address and your custom net settings by using
93 * the following syntax.
95 * #define CONFIG_ETHADDR xx:xx:xx:xx:xx:xx
96 * #define CONFIG_SERVERIP <server ip>
97 * #define CONFIG_IPADDR <board ip>
98 * #define CONFIG_GATEWAYIP <gateway ip>
99 * #define CONFIG_NETMASK <your netmask>
102 #define CONFIG_BOOTDELAY 5
104 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
106 #define xstr(s) str(s)
109 #define CONFIG_EXTRA_ENV_SETTINGS \
111 "nfsargs=setenv bootargs root=/dev/nfs rw " \
112 "nfsroot=${serverip}:${rootpath}\0" \
113 "ramargs=setenv bootargs root=/dev/ram rw\0" \
114 "addip=setenv bootargs ${bootargs} " \
115 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
116 ":${hostname}:${netdev}:off panic=1\0" \
117 "addtty=setenv bootargs ${bootargs}" \
118 " console=ttymxc0,${baudrate}\0" \
119 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
120 "addmisc=setenv bootargs ${bootargs}\0" \
121 "uboot_addr=a0000000\0" \
122 "kernel_addr=a0080000\0" \
123 "ramdisk_addr=a0300000\0" \
124 "u-boot=qong/u-boot.bin\0" \
125 "kernel_addr_r=80800000\0" \
127 "bootfile=qong/uImage\0" \
128 "rootpath=/opt/eldk-4.2-arm/armVFP\0" \
129 "flash_self=run ramargs addip addtty addmtd addmisc;" \
130 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
131 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
132 "bootm ${kernel_addr}\0" \
133 "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \
134 "run nfsargs addip addtty addmtd addmisc;" \
136 "bootcmd=run flash_self\0" \
137 "load=tftp ${loadaddr} ${u-boot}\0" \
138 "update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) \
139 " +${filesize};era " xstr(CONFIG_SYS_MONITOR_BASE) \
140 " +${filesize};cp.b ${fileaddr} " \
141 xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \
142 "upd=run load update\0" \
145 * Miscellaneous configurable options
147 #define CONFIG_SYS_LONGHELP /* undef to save memory */
148 #define CONFIG_SYS_PROMPT "=> "
149 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
150 /* Print Buffer Size */
151 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
152 sizeof(CONFIG_SYS_PROMPT) + 16)
153 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
154 /* Boot Argument Buffer Size */
155 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
157 /* memtest works on first 255MB of RAM */
158 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
159 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0xff000000)
161 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
163 #define CONFIG_SYS_HZ 1000
165 #define CONFIG_CMDLINE_EDITING 1
167 #define CONFIG_MISC_INIT_R 1
168 /*-----------------------------------------------------------------------
171 * The stack sizes are set up in start.S using the settings below
173 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
175 /*-----------------------------------------------------------------------
176 * Physical Memory Map
178 #define CONFIG_NR_DRAM_BANKS 1
179 #define PHYS_SDRAM_1 CSD0_BASE
180 #define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */
187 extern void qong_nand_plat_init(void *chip);
188 extern int qong_nand_rdy(void *chip);
190 #define CONFIG_NAND_PLAT
191 #define CONFIG_SYS_MAX_NAND_DEVICE 1
192 #define CONFIG_SYS_NAND_BASE CS3_BASE
193 #define NAND_PLAT_INIT() qong_nand_plat_init(nand)
195 #define QONG_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 24))
196 #define QONG_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 23))
197 #define QONG_NAND_WRITE(addr, cmd) \
199 __REG8(addr) = cmd; \
202 #define NAND_PLAT_WRITE_CMD(chip, cmd) QONG_NAND_WRITE(QONG_NAND_CLE(chip), cmd)
203 #define NAND_PLAT_WRITE_ADR(chip, cmd) QONG_NAND_WRITE(QONG_NAND_ALE(chip), cmd)
204 #define NAND_PLAT_DEV_READY(chip) (qong_nand_rdy(chip))
206 /*-----------------------------------------------------------------------
207 * FLASH and environment organization
209 #define CONFIG_SYS_FLASH_BASE CS0_BASE
210 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
211 /* max number of sectors on one chip */
212 #define CONFIG_SYS_MAX_FLASH_SECT 1024
213 /* Monitor at beginning of flash */
214 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
215 #define CONFIG_SYS_MONITOR_LEN 0x40000 /* Reserve 256KiB */
217 #define CONFIG_ENV_IS_IN_FLASH 1
218 #define CONFIG_ENV_SECT_SIZE 0x20000
219 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
220 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x60000)
222 /* Address and size of Redundant Environment Sector */
223 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
224 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
226 /*-----------------------------------------------------------------------
227 * CFI FLASH driver setup
229 /* Flash memory is CFI compliant */
230 #define CONFIG_SYS_FLASH_CFI 1
231 /* Use drivers/cfi_flash.c */
232 #define CONFIG_FLASH_CFI_DRIVER 1
233 /* Use buffered writes (~10x faster) */
234 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
235 /* Use hardware sector protection */
236 #define CONFIG_SYS_FLASH_PROTECTION 1
241 #define CONFIG_CMD_JFFS2
242 #define CONFIG_CMD_UBI
243 #define CONFIG_CMD_UBIFS
244 #define CONFIG_RBTREE
245 #define CONFIG_MTD_PARTITIONS
246 #define CONFIG_CMD_MTDPARTS
248 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
249 #define CONFIG_FLASH_CFI_MTD
250 #define MTDIDS_DEFAULT "nor0=physmap-flash.0"
251 #define MTDPARTS_DEFAULT \
252 "mtdparts=physmap-flash.0:256k(U-Boot),128k(env1)," \
253 "128k(env2),2560k(kernel),13m(ramdisk),-(user)"
255 #endif /* __CONFIG_H */