include/configs/porter.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * include/configs/porter.h
   4  *     This file is Porter board configuration.
   5  *
   6  * Copyright (C) 2015 Renesas Electronics Corporation
   7  * Copyright (C) 2015 Cogent Embedded, Inc.
   8  */
   9
  10 #ifndef __PORTER_H
  11 #define __PORTER_H
  12
  13 #include "rcar-gen2-common.h"
  14
  15 #define CONFIG_SYS_INIT_SP_ADDR         0x4f000000
  16 #define STACK_AREA_SIZE                 0x00100000
  17 #define LOW_LEVEL_MERAM_STACK \
  18                 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
  19
  20 /* MEMORY */
  21 #define RCAR_GEN2_SDRAM_BASE            0x40000000
  22 #define RCAR_GEN2_SDRAM_SIZE            (2048u * 1024 * 1024)
  23 #define RCAR_GEN2_UBOOT_SDRAM_SIZE      (1024u * 1024 * 1024)
  24
  25 /* FLASH */
  26 #define CONFIG_SPI_FLASH_QUAD
  27
  28 /* SH Ether */
  29 #define CONFIG_SH_ETHER_USE_PORT        0
  30 #define CONFIG_SH_ETHER_PHY_ADDR        0x1
  31 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
  32 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
  33 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
  34 #define CONFIG_SH_ETHER_ALIGNE_SIZE     64
  35 #define CONFIG_BITBANGMII
  36 #define CONFIG_BITBANGMII_MULTI
  37
  38 /* Board Clock */
  39 #define RMOBILE_XTAL_CLK        20000000u
  40 #define CONFIG_SYS_CLK_FREQ     RMOBILE_XTAL_CLK
  41 #define CONFIG_SH_TMU_CLK_FREQ  (CONFIG_SYS_CLK_FREQ / 2)
  42
  43 #define CONFIG_SYS_TMU_CLK_DIV  4
  44
  45 #define CONFIG_EXTRA_ENV_SETTINGS       \
  46         "fdt_high=0xffffffff\0"         \
  47         "initrd_high=0xffffffff\0"
  48
  49 /* SPL support */
  50 #define CONFIG_SPL_TEXT_BASE            0xe6300000
  51 #define CONFIG_SPL_STACK                0xe6340000
  52 #define CONFIG_SPL_MAX_SIZE             0x4000
  53 #define CONFIG_SYS_SPI_U_BOOT_OFFS      0x140000
  54 #ifdef CONFIG_SPL_BUILD
  55 #define CONFIG_CONS_SCIF0
  56 #define CONFIG_SH_SCIF_CLK_FREQ         65000000
  57 #endif
  58
  59 #endif /* __PORTER_H */