Merge branch 'master' of git://git.denx.de/u-boot-socfpga
[oweals/u-boot.git] / include / configs / pico-imx7d.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2017 NXP Semiconductors
4  *
5  * Configuration settings for the i.MX7D Pico board.
6  */
7
8 #ifndef __PICO_IMX7D_CONFIG_H
9 #define __PICO_IMX7D_CONFIG_H
10
11 #include "mx7_common.h"
12
13 #include "imx7_spl.h"
14
15 #ifdef CONFIG_SPL_OS_BOOT
16 /* Falcon Mode */
17 #define CONFIG_SPL_FS_LOAD_ARGS_NAME    "args"
18 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME  "uImage"
19 #define CONFIG_SYS_SPL_ARGS_ADDR        0x88000000
20
21 /* Falcon Mode - MMC support: args@1MB kernel@2MB */
22 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR  0x800   /* 1MB */
23 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512)
24 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR        0x1000  /* 2MB */
25 #endif
26
27 /* Size of malloc() pool */
28 #define CONFIG_SYS_MALLOC_LEN           (32 * SZ_1M)
29
30 #define CONFIG_MXC_UART_BASE            UART5_IPS_BASE_ADDR
31
32 /* Network */
33 #define CONFIG_FEC_MXC
34 #define CONFIG_MII
35 #define CONFIG_FEC_XCV_TYPE             RGMII
36 #define CONFIG_ETHPRIME                 "FEC"
37 #define CONFIG_FEC_MXC_PHYADDR          1
38
39 #define CONFIG_PHY_ATHEROS
40
41 /* ENET1 */
42 #define IMX_FEC_BASE                    ENET_IPS_BASE_ADDR
43
44 /* MMC Config */
45 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
46
47 #define CONFIG_DFU_ENV_SETTINGS \
48         "dfu_alt_info=" \
49                 "spl raw 0x2 0x400 mmcpart 1;" \
50                 "u-boot raw 0x8a 0x400 mmcpart 1;" \
51                 "/boot/zImage ext4 0 1;" \
52                 "/boot/imx7d-pico-pi.dtb ext4 0 1;" \
53                 "rootfs part 0 1\0" \
54
55 #define BOOTMENU_ENV \
56         "bootmenu_0=Boot using PICO-PI baseboard=" \
57                 "setenv fdtfile imx7d-pico-pi.dtb\0" \
58
59 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
60 #define CONFIG_SYS_MMC_IMG_LOAD_PART    1
61
62 #define CONFIG_EXTRA_ENV_SETTINGS \
63         "script=boot.scr\0" \
64         "image=zImage\0" \
65         "console=ttymxc4\0" \
66         "fdt_high=0xffffffff\0" \
67         "initrd_high=0xffffffff\0" \
68         "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
69         BOOTMENU_ENV \
70         "fdt_addr=0x83000000\0" \
71         "fdt_addr_r=0x83000000\0" \
72         "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
73         "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
74         "ramdisk_addr_r=0x83000000\0" \
75         "ramdiskaddr=0x83000000\0" \
76         "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
77         CONFIG_DFU_ENV_SETTINGS \
78         "findfdt=" \
79                 "if test $fdtfile = ask ; then " \
80                         "bootmenu -1; fi;" \
81                 "if test $fdtfile != ask ; then " \
82                         "saveenv; fi;\0" \
83         "finduuid=part uuid mmc 0:1 uuid\0" \
84         "partitions=" \
85                 "uuid_disk=${uuid_gpt_disk};" \
86                 "name=rootfs,size=0,uuid=${uuid_gpt_rootfs}\0" \
87         "fastboot_partition_alias_system=rootfs\0" \
88         "setup_emmc=mmc dev 0; gpt write mmc 0 $partitions; reset;\0" \
89         BOOTENV
90
91 #define BOOT_TARGET_DEVICES(func) \
92         func(MMC, mmc, 0) \
93         func(DHCP, dhcp, na)
94
95 #include <config_distro_bootcmd.h>
96
97 #define CONFIG_SYS_MEMTEST_START        0x80000000
98 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + 0x20000000)
99
100 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
101 #define CONFIG_SYS_HZ                   1000
102
103 /* Physical Memory Map */
104 #define PHYS_SDRAM                      MMDC0_ARB_BASE_ADDR
105
106 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM
107 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
108 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
109
110 #define CONFIG_SYS_INIT_SP_OFFSET \
111         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
112 #define CONFIG_SYS_INIT_SP_ADDR \
113         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
114
115 /* I2C configs */
116 #define CONFIG_SYS_I2C
117 #define CONFIG_SYS_I2C_MXC
118 #define CONFIG_SYS_I2C_MXC_I2C1
119 #define CONFIG_SYS_I2C_MXC_I2C2
120 #define CONFIG_SYS_I2C_MXC_I2C3
121 #define CONFIG_SYS_I2C_MXC_I2C4
122 #define CONFIG_SYS_I2C_SPEED            100000
123
124 /* PMIC */
125 #define CONFIG_POWER
126 #define CONFIG_POWER_I2C
127 #define CONFIG_POWER_PFUZE3000
128 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
129
130 /* FLASH and environment organization */
131 #define CONFIG_ENV_SIZE                 SZ_8K
132
133 #define CONFIG_ENV_OFFSET                       (8 * SZ_64K)
134 #define CONFIG_SYS_FSL_USDHC_NUM                2
135
136 #define CONFIG_SYS_MMC_ENV_DEV                  0
137 #define CONFIG_SYS_MMC_ENV_PART         0
138
139 /* USB Configs */
140 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
141 #define CONFIG_MXC_USB_PORTSC                   (PORT_PTS_UTMI | PORT_PTS_PTW)
142 #define CONFIG_MXC_USB_FLAGS                    0
143 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
144
145 #define CONFIG_IMX_THERMAL
146
147 #endif