2 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
3 * Copyright (C) 2014 Bachmann electronic GmbH
5 * SPDX-License-Identifier: GPL-2.0+
11 #include "mx6_common.h"
13 /* Size of malloc() pool */
14 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
16 #define CONFIG_MISC_INIT_R
19 #define CONFIG_MXC_UART
20 #define CONFIG_MXC_UART_BASE UART1_BASE
24 #define CONFIG_MXC_SPI
25 #define CONFIG_SF_DEFAULT_BUS 2
26 #define CONFIG_SF_DEFAULT_CS 0
27 #define CONFIG_SF_DEFAULT_SPEED 25000000
28 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
31 #define CONFIG_PCA953X
32 #define CONFIG_SYS_I2C_PCA953X_ADDR 0x20
33 #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} }
34 #define CONFIG_CMD_PCA953X
35 #define CONFIG_CMD_PCA953X_INFO
38 #define CONFIG_SYS_I2C
39 #define CONFIG_SYS_I2C_MXC
40 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
41 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
42 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
43 #define CONFIG_SYS_I2C_SPEED 100000
46 #define CONFIG_IMX_OTP
47 #define IMX_OTP_BASE OCOTP_BASE_ADDR
48 #define IMX_OTP_ADDR_MAX 0x7F
49 #define IMX_OTP_DATA_ERROR_VAL 0xBADABADA
50 #define IMX_OTPWRITE_ENABLED
53 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
54 #define CONFIG_SYS_FSL_USDHC_NUM 2
57 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
58 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
63 #ifdef CONFIG_CMD_SATA
64 #define CONFIG_DWC_AHSATA
65 #define CONFIG_SYS_SATA_MAX_DEVICE 1
66 #define CONFIG_DWC_AHSATA_PORT_ID 0
67 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
75 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
76 #define CONFIG_SPL_SPI_LOAD
79 #define CONFIG_FEC_MXC
81 #define IMX_FEC_BASE ENET_BASE_ADDR
82 #define CONFIG_FEC_XCV_TYPE MII100
83 #define CONFIG_ETHPRIME "FEC"
84 #define CONFIG_FEC_MXC_PHYADDR 0x5
85 #define CONFIG_PHY_SMSC
88 #define CONFIG_ENV_EEPROM_IS_ON_I2C
89 #define CONFIG_SYS_I2C_EEPROM_BUS 1
90 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
91 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
92 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
95 #define CONFIG_PREBOOT ""
98 #define CONFIG_IMX_THERMAL
100 /* Print Buffer Size */
101 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
103 /* Physical Memory Map */
104 #define CONFIG_NR_DRAM_BANKS 1
105 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
107 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
108 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
109 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
111 #define CONFIG_SYS_INIT_SP_OFFSET \
112 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
113 #define CONFIG_SYS_INIT_SP_ADDR \
114 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
116 /* Environment organization */
117 #define CONFIG_ENV_SIZE (64 * 1024) /* 64 kb */
118 #define CONFIG_ENV_OFFSET (1024 * 1024)
119 /* M25P16 has an erase size of 64 KiB */
120 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
121 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
122 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
123 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
124 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
126 #define CONFIG_BOOTP_SERVERIP
127 #define CONFIG_BOOTP_BOOTFILE
129 #endif /* __CONFIG_H */