2 * Configuration settings for the Gumstix Overo board.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * High Level Configuration Options
26 #define CONFIG_ARMCORTEXA8 1 /* This is an ARM V7 CPU core */
27 #define CONFIG_OMAP 1 /* in a TI OMAP core */
28 #define CONFIG_OMAP34XX 1 /* which is a 34XX */
29 #define CONFIG_OMAP3430 1 /* which is in a 3430 */
30 #define CONFIG_OMAP3_OVERO 1 /* working with overo */
32 #include <asm/arch/cpu.h> /* get chip and board defs */
33 #include <asm/arch/omap3.h>
36 * Display CPU and Board information
38 #define CONFIG_DISPLAY_CPUINFO 1
39 #define CONFIG_DISPLAY_BOARDINFO 1
42 #define V_OSCK 26000000 /* Clock output from T2 */
43 #define V_SCLK (V_OSCK >> 1)
45 #undef CONFIG_USE_IRQ /* no support for IRQs */
46 #define CONFIG_MISC_INIT_R
48 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
49 #define CONFIG_SETUP_MEMORY_TAGS 1
50 #define CONFIG_INITRD_TAG 1
51 #define CONFIG_REVISION_TAG 1
54 * Size of malloc() pool
56 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
58 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
59 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */
67 * NS16550 Configuration
69 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
71 #define CONFIG_SYS_NS16550
72 #define CONFIG_SYS_NS16550_SERIAL
73 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
74 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
77 * select serial console configuration
79 #define CONFIG_CONS_INDEX 3
80 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
81 #define CONFIG_SERIAL3 3
83 /* allow to overwrite serial and ethaddr */
84 #define CONFIG_ENV_OVERWRITE
85 #define CONFIG_BAUDRATE 115200
86 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
89 #define CONFIG_OMAP3_MMC 1
90 #define CONFIG_DOS_PARTITION 1
92 /* DDR - I use Micron DDR */
93 #define CONFIG_OMAP3_MICRON_DDR 1
95 /* commands to include */
96 #include <config_cmd_default.h>
98 #define CONFIG_CMD_EXT2 /* EXT2 Support */
99 #define CONFIG_CMD_FAT /* FAT support */
100 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */
102 #define CONFIG_CMD_I2C /* I2C serial bus support */
103 #define CONFIG_CMD_MMC /* MMC support */
104 #define CONFIG_CMD_NAND /* NAND support */
106 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
107 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
108 #undef CONFIG_CMD_IMI /* iminfo */
109 #undef CONFIG_CMD_IMLS /* List all found images */
110 #undef CONFIG_CMD_NFS /* NFS support */
111 #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
113 #define CONFIG_SYS_NO_FLASH
114 #define CONFIG_HARD_I2C 1
115 #define CONFIG_SYS_I2C_SPEED 100000
116 #define CONFIG_SYS_I2C_SLAVE 1
117 #define CONFIG_SYS_I2C_BUS 0
118 #define CONFIG_SYS_I2C_BUS_SELECT 1
119 #define CONFIG_DRIVER_OMAP34XX_I2C 1
124 #define CONFIG_TWL4030_POWER 1
125 #define CONFIG_TWL4030_LED 1
130 #define CONFIG_NAND_OMAP_GPMC
131 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
133 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
136 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1
138 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
140 #define CONFIG_JFFS2_NAND
141 /* nand device jffs2 lives on */
142 #define CONFIG_JFFS2_DEV "nand0"
143 /* start of jffs2 partition */
144 #define CONFIG_JFFS2_PART_OFFSET 0x680000
145 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
148 /* Environment information */
149 #define CONFIG_BOOTDELAY 5
151 #define CONFIG_EXTRA_ENV_SETTINGS \
152 "loadaddr=0x82000000\0" \
153 "console=ttyS2,115200n8\0" \
155 "dvimode=1024x768MR-16@60\0" \
156 "defaultdisplay=dvi\0" \
157 "mmcroot=/dev/mmcblk0p2 rw\0" \
158 "mmcrootfstype=ext3 rootwait\0" \
159 "nandroot=/dev/mtdblock4 rw\0" \
160 "nandrootfstype=jffs2\0" \
161 "mmcargs=setenv bootargs console=${console} " \
163 "omapfb.mode=dvi:${dvimode} " \
165 "omapdss.def_disp=${defaultdisplay} " \
167 "rootfstype=${mmcrootfstype}\0" \
168 "nandargs=setenv bootargs console=${console} " \
170 "omapfb.mode=dvi:${dvimode} " \
172 "omapdss.def_disp=${defaultdisplay} " \
173 "root=${nandroot} " \
174 "rootfstype=${nandrootfstype}\0" \
175 "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \
176 "bootscript=echo Running bootscript from mmc ...; " \
177 "source ${loadaddr}\0" \
178 "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \
179 "mmcboot=echo Booting from mmc ...; " \
181 "bootm ${loadaddr}\0" \
182 "nandboot=echo Booting from nand ...; " \
184 "nand read ${loadaddr} 280000 400000; " \
185 "bootm ${loadaddr}\0" \
187 #define CONFIG_BOOTCOMMAND \
188 "if mmc init; then " \
189 "if run loadbootscript; then " \
192 "if run loaduimage; then " \
194 "else run nandboot; " \
197 "else run nandboot; fi"
199 #define CONFIG_AUTO_COMPLETE 1
201 * Miscellaneous configurable options
203 #define CONFIG_SYS_LONGHELP /* undef to save memory */
204 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
205 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
206 #define CONFIG_SYS_PROMPT "Overo # "
207 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
208 /* Print Buffer Size */
209 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
210 sizeof(CONFIG_SYS_PROMPT) + 16)
211 #define CONFIG_SYS_MAXARGS 16 /* max number of command */
213 /* Boot Argument Buffer Size */
214 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
215 /* memtest works on */
216 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
217 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
218 0x01F00000) /* 31MB */
220 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
223 * OMAP3 has 12 GP timers, they can be driven by the system clock
224 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
225 * This rate is divided by a local divisor.
227 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
228 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
229 #define CONFIG_SYS_HZ 1000
231 /*-----------------------------------------------------------------------
234 * The stack sizes are set up in start.S using the settings below
236 #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
237 #ifdef CONFIG_USE_IRQ
238 #define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */
239 #define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */
242 /*-----------------------------------------------------------------------
243 * Physical Memory Map
245 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
246 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
247 #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
248 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
250 /* SDRAM Bank Allocation method */
253 /*-----------------------------------------------------------------------
254 * FLASH and environment organization
257 /* **** PISMO SUPPORT *** */
259 /* Configure the PISMO */
260 #define PISMO1_NAND_SIZE GPMC_SIZE_128M
261 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M
263 #define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors on */
265 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */
266 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
268 #define CONFIG_SYS_FLASH_BASE boot_flash_base
270 /* Monitor at start of flash */
271 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
272 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
274 #define CONFIG_ENV_IS_IN_NAND 1
275 #define ONENAND_ENV_OFFSET 0x240000 /* environment starts here */
276 #define SMNAND_ENV_OFFSET 0x240000 /* environment starts here */
278 #define CONFIG_SYS_ENV_SECT_SIZE boot_flash_sec
279 #define CONFIG_ENV_OFFSET boot_flash_off
280 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
282 /*-----------------------------------------------------------------------
283 * CFI FLASH driver setup
285 /* timeout values are in ticks */
286 #define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
287 #define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
289 /* Flash banks JFFS2 should use */
290 #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
291 CONFIG_SYS_MAX_NAND_DEVICE)
292 #define CONFIG_SYS_JFFS2_MEM_NAND
293 /* use flash_info[2] */
294 #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
295 #define CONFIG_SYS_JFFS2_NUM_BANKS 1
298 extern unsigned int boot_flash_base;
299 extern volatile unsigned int boot_flash_env_addr;
300 extern unsigned int boot_flash_off;
301 extern unsigned int boot_flash_sec;
302 extern unsigned int boot_flash_type;
305 #if defined(CONFIG_CMD_NET)
306 /*----------------------------------------------------------------------------
307 * SMSC9211 Ethernet from SMSC9118 family
308 *----------------------------------------------------------------------------
311 #define CONFIG_NET_MULTI
312 #define CONFIG_SMC911X 1
313 #define CONFIG_SMC911X_32_BIT
314 #define CONFIG_SMC911X_BASE 0x2C000000
316 #endif /* (CONFIG_CMD_NET) */
318 #endif /* __CONFIG_H */