2 * Common configuration settings for the TI OMAP3 EVM board.
4 * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
12 * kind, whether express or implied; without even the implied warranty
13 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #ifndef __OMAP3_EVM_COMMON_H
18 #define __OMAP3_EVM_COMMON_H
21 * High level configuration options
23 #define CONFIG_OMAP /* This is TI OMAP core */
24 #define CONFIG_OMAP34XX /* belonging to 34XX family */
26 #define CONFIG_SDRC /* The chip has SDRC controller */
28 #define CONFIG_OMAP3_EVM /* This is a OMAP3 EVM */
29 #define CONFIG_OMAP3_MICRON_DDR /* with MICRON DDR part */
30 #define CONFIG_TWL4030_POWER /* with TWL4030 PMIC */
32 #undef CONFIG_USE_IRQ /* no support for IRQs */
35 * Clock related definitions
37 #define V_OSCK 26000000 /* Clock output from T2 */
38 #define V_SCLK (V_OSCK >> 1)
41 * OMAP3 has 12 GP timers, they can be driven by the system clock
42 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
43 * This rate is divided by a local divisor.
45 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
46 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
47 #define CONFIG_SYS_HZ 1000
49 /* Size of environment - 128KB */
50 #define CONFIG_ENV_SIZE (128 << 10)
52 /* Size of malloc pool */
53 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
57 * These values are used in start.S
59 #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
63 * Note 1: CS1 may or may not be populated
64 * Note 2: SDRAM size is expected to be at least 32MB
66 #define CONFIG_NR_DRAM_BANKS 2
67 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
68 #define PHYS_SDRAM_1_SIZE (32 << 20)
69 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
71 /* Limits for memtest */
72 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
73 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
74 0x01F00000) /* 31MB */
76 /* Default load address */
77 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
79 /* -----------------------------------------------------------------------------
81 * -----------------------------------------------------------------------------
85 * NS16550 Configuration
87 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
89 #define CONFIG_SYS_NS16550
90 #define CONFIG_SYS_NS16550_SERIAL
91 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
92 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
95 * select serial console configuration
97 #define CONFIG_CONS_INDEX 1
98 #define CONFIG_SERIAL1 1 /* UART1 on OMAP3 EVM */
99 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
100 #define CONFIG_BAUDRATE 115200
101 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
107 #define CONFIG_HARD_I2C
108 #define CONFIG_DRIVER_OMAP34XX_I2C
110 #define CONFIG_SYS_I2C_SPEED 100000
111 #define CONFIG_SYS_I2C_SLAVE 1
112 #define CONFIG_SYS_I2C_BUS 0
113 #define CONFIG_SYS_I2C_BUS_SELECT 1
118 #define PISMO1_NAND_SIZE GPMC_SIZE_128M
119 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M
121 /* Monitor at start of flash - Reserve 2 sectors */
122 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
124 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
126 /* Start location & size of environment */
127 #define ONENAND_ENV_OFFSET 0x260000
128 #define SMNAND_ENV_OFFSET 0x260000
130 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
135 /* Physical address to access NAND */
136 #define CONFIG_SYS_NAND_ADDR NAND_BASE
138 /* Physical address to access NAND at CS0 */
139 #define CONFIG_SYS_NAND_BASE NAND_BASE
141 /* Max number of NAND devices */
142 #define CONFIG_SYS_MAX_NAND_DEVICE 1
144 /* Timeout values (in ticks) */
145 #define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
146 #define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
148 /* Flash banks JFFS2 should use */
149 #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
150 CONFIG_SYS_MAX_NAND_DEVICE)
152 #define CONFIG_SYS_JFFS2_MEM_NAND
153 #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
154 #define CONFIG_SYS_JFFS2_NUM_BANKS 1
156 #define CONFIG_JFFS2_NAND
157 /* nand device jffs2 lives on */
158 #define CONFIG_JFFS2_DEV "nand0"
159 /* Start of jffs2 partition */
160 #define CONFIG_JFFS2_PART_OFFSET 0x680000
161 /* Size of jffs2 partition */
162 #define CONFIG_JFFS2_PART_SIZE 0xf980000
167 #ifdef CONFIG_USB_OMAP3
169 #ifdef CONFIG_MUSB_HCD
170 #define CONFIG_CMD_USB
172 #define CONFIG_USB_STORAGE
173 #define CONGIG_CMD_STORAGE
174 #define CONFIG_CMD_FAT
176 #ifdef CONFIG_USB_KEYBOARD
177 #define CONFIG_SYS_USB_EVENT_POLL
178 #define CONFIG_PREBOOT "usb start"
179 #endif /* CONFIG_USB_KEYBOARD */
181 #endif /* CONFIG_MUSB_HCD */
183 #ifdef CONFIG_MUSB_UDC
184 /* USB device configuration */
185 #define CONFIG_USB_DEVICE
186 #define CONFIG_USB_TTY
187 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
189 /* Change these to suit your needs */
190 #define CONFIG_USBD_VENDORID 0x0451
191 #define CONFIG_USBD_PRODUCTID 0x5678
192 #define CONFIG_USBD_MANUFACTURER "Texas Instruments"
193 #define CONFIG_USBD_PRODUCT_NAME "EVM"
194 #endif /* CONFIG_MUSB_UDC */
196 #endif /* CONFIG_USB_OMAP3 */
198 /* ----------------------------------------------------------------------------
200 * ----------------------------------------------------------------------------
202 #define CONFIG_SYS_PROMPT "OMAP3_EVM # "
203 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
204 #define CONFIG_SYS_MAXARGS 16 /* max args for a command */
206 #define CONFIG_MISC_INIT_R
208 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
209 #define CONFIG_SETUP_MEMORY_TAGS
210 #define CONFIG_INITRD_TAG
211 #define CONFIG_REVISION_TAG
213 /* Size of Console IO buffer */
214 #define CONFIG_SYS_CBSIZE 512
216 /* Size of print buffer */
217 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
218 sizeof(CONFIG_SYS_PROMPT) + 16)
220 /* Size of bootarg buffer */
221 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
223 #define CONFIG_BOOTFILE "uImage"
228 #if defined(CONFIG_CMD_NAND)
229 #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
231 #define CONFIG_NAND_OMAP_GPMC
232 #define GPMC_NAND_ECC_LP_x16_LAYOUT
233 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
234 #elif defined(CONFIG_CMD_ONENAND)
235 #define CONFIG_SYS_FLASH_BASE PISMO1_ONEN_BASE
236 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
239 #if !defined(CONFIG_ENV_IS_NOWHERE)
240 #if defined(CONFIG_CMD_NAND)
241 #define CONFIG_ENV_IS_IN_NAND
242 #elif defined(CONFIG_CMD_ONENAND)
243 #define CONFIG_ENV_IS_IN_ONENAND
244 #define CONFIG_ENV_OFFSET ONENAND_ENV_OFFSET
246 #endif /* CONFIG_ENV_IS_NOWHERE */
248 #define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
250 #if defined(CONFIG_CMD_NET)
252 /* Ethernet (SMSC9115 from SMSC9118 family) */
253 #define CONFIG_NET_MULTI
254 #define CONFIG_SMC911X
255 #define CONFIG_SMC911X_32_BIT
256 #define CONFIG_SMC911X_BASE 0x2C000000
259 #define CONFIG_BOOTP_SUBNETMASK 0x00000001
260 #define CONFIG_BOOTP_GATEWAY 0x00000002
261 #define CONFIG_BOOTP_HOSTNAME 0x00000004
262 #define CONFIG_BOOTP_BOOTPATH 0x00000010
264 #endif /* CONFIG_CMD_NET */
266 /* Support for relocation */
267 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
268 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
269 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
270 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
271 CONFIG_SYS_INIT_RAM_SIZE - \
272 GENERATED_GBL_DATA_SIZE)
274 /* -----------------------------------------------------------------------------
276 * -----------------------------------------------------------------------------
278 #define CONFIG_SYS_NO_FLASH
280 /* Uncomment to define the board revision statically */
281 /* #define CONFIG_STATIC_BOARD_REV OMAP3EVM_BOARD_GEN_2 */
283 #define CONFIG_SYS_CACHELINE_SIZE 64
285 #endif /* __OMAP3_EVM_COMMON_H */