2 * (C) Copyright 2006-2008
4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Syed Mohammed Khasim <x0khasim@ti.com>
7 * Configuration settings for the TI OMAP3530 Beagle board.
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 #include <asm/sizes.h>
33 * High Level Configuration Options
35 #define CONFIG_ARMCORTEXA8 1 /* This is an ARM V7 CPU core */
36 #define CONFIG_OMAP 1 /* in a TI OMAP core */
37 #define CONFIG_OMAP34XX 1 /* which is a 34XX */
38 #define CONFIG_OMAP3430 1 /* which is in a 3430 */
39 #define CONFIG_OMAP3_BEAGLE 1 /* working with BEAGLE */
41 #include <asm/arch/cpu.h> /* get chip and board defs */
42 #include <asm/arch/omap3.h>
45 * Display CPU and Board information
47 #define CONFIG_DISPLAY_CPUINFO 1
48 #define CONFIG_DISPLAY_BOARDINFO 1
51 #define V_OSCK 26000000 /* Clock output from T2 */
52 #define V_SCLK (V_OSCK >> 1)
54 #undef CONFIG_USE_IRQ /* no support for IRQs */
55 #define CONFIG_MISC_INIT_R
57 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
58 #define CONFIG_SETUP_MEMORY_TAGS 1
59 #define CONFIG_INITRD_TAG 1
60 #define CONFIG_REVISION_TAG 1
63 * Size of malloc() pool
65 #define CONFIG_ENV_SIZE SZ_128K /* Total Size Environment */
67 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_128K)
68 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */
76 * NS16550 Configuration
78 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
80 #define CONFIG_SYS_NS16550
81 #define CONFIG_SYS_NS16550_SERIAL
82 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
83 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
86 * select serial console configuration
88 #define CONFIG_CONS_INDEX 3
89 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
90 #define CONFIG_SERIAL3 3 /* UART3 on Beagle Rev 2 */
92 /* allow to overwrite serial and ethaddr */
93 #define CONFIG_ENV_OVERWRITE
94 #define CONFIG_BAUDRATE 115200
95 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
98 #define CONFIG_OMAP3_MMC 1
99 #define CONFIG_DOS_PARTITION 1
101 /* commands to include */
102 #include <config_cmd_default.h>
104 #define CONFIG_CMD_EXT2 /* EXT2 Support */
105 #define CONFIG_CMD_FAT /* FAT support */
106 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */
107 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
108 #define MTDIDS_DEFAULT "nand0=nand"
109 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
110 "1920k(u-boot),128k(u-boot-env),"\
113 #define CONFIG_CMD_I2C /* I2C serial bus support */
114 #define CONFIG_CMD_MMC /* MMC support */
115 #define CONFIG_CMD_NAND /* NAND support */
117 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
118 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
119 #undef CONFIG_CMD_IMI /* iminfo */
120 #undef CONFIG_CMD_IMLS /* List all found images */
121 #undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
122 #undef CONFIG_CMD_NFS /* NFS support */
124 #define CONFIG_SYS_NO_FLASH
125 #define CONFIG_SYS_I2C_SPEED 100000
126 #define CONFIG_SYS_I2C_SLAVE 1
127 #define CONFIG_SYS_I2C_BUS 0
128 #define CONFIG_SYS_I2C_BUS_SELECT 1
129 #define CONFIG_DRIVER_OMAP34XX_I2C 1
134 #define CONFIG_NAND_OMAP_GPMC
135 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
137 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
138 /* to access nand at */
140 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1
142 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
145 #define CONFIG_JFFS2_NAND
146 /* nand device jffs2 lives on */
147 #define CONFIG_JFFS2_DEV "nand0"
148 /* start of jffs2 partition */
149 #define CONFIG_JFFS2_PART_OFFSET 0x680000
150 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
153 /* Environment information */
154 #define CONFIG_BOOTDELAY 10
156 #define CONFIG_EXTRA_ENV_SETTINGS \
157 "loadaddr=0x82000000\0" \
158 "console=ttyS2,115200n8\0" \
159 "videomode=1024x768@60,vxres=1024,vyres=768\0" \
160 "videospec=omapfb:vram:2M,vram:4M\0" \
161 "mmcargs=setenv bootargs console=${console} " \
162 "video=${videospec},mode:${videomode} " \
163 "root=/dev/mmcblk0p2 rw " \
164 "rootfstype=ext3 rootwait\0" \
165 "nandargs=setenv bootargs console=${console} " \
166 "video=${videospec},mode:${videomode} " \
167 "root=/dev/mtdblock4 rw " \
168 "rootfstype=jffs2\0" \
169 "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \
170 "bootscript=echo Running bootscript from mmc ...; " \
171 "source ${loadaddr}\0" \
172 "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \
173 "mmcboot=echo Booting from mmc ...; " \
175 "bootm ${loadaddr}\0" \
176 "nandboot=echo Booting from nand ...; " \
178 "nand read ${loadaddr} 280000 400000; " \
179 "bootm ${loadaddr}\0" \
181 #define CONFIG_BOOTCOMMAND \
182 "if mmc init; then " \
183 "if run loadbootscript; then " \
186 "if run loaduimage; then " \
188 "else run nandboot; " \
191 "else run nandboot; fi"
193 #define CONFIG_AUTO_COMPLETE 1
195 * Miscellaneous configurable options
197 #define V_PROMPT "OMAP3 beagleboard.org # "
199 #define CONFIG_SYS_LONGHELP /* undef to save memory */
200 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
201 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
202 #define CONFIG_SYS_PROMPT V_PROMPT
203 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
204 /* Print Buffer Size */
205 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
206 sizeof(CONFIG_SYS_PROMPT) + 16)
207 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
208 /* Boot Argument Buffer Size */
209 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
211 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */
213 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
214 0x01F00000) /* 31MB */
216 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
220 * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
221 * 32KHz clk, or from external sig. This rate is divided by a local divisor.
223 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
224 #define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */
225 #define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV))
227 /*-----------------------------------------------------------------------
230 * The stack sizes are set up in start.S using the settings below
232 #define CONFIG_STACKSIZE SZ_128K /* regular stack */
233 #ifdef CONFIG_USE_IRQ
234 #define CONFIG_STACKSIZE_IRQ SZ_4K /* IRQ stack */
235 #define CONFIG_STACKSIZE_FIQ SZ_4K /* FIQ stack */
238 /*-----------------------------------------------------------------------
239 * Physical Memory Map
241 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
242 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
243 #define PHYS_SDRAM_1_SIZE SZ_32M /* at least 32 meg */
244 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
246 /* SDRAM Bank Allocation method */
249 /*-----------------------------------------------------------------------
250 * FLASH and environment organization
253 /* **** PISMO SUPPORT *** */
255 /* Configure the PISMO */
256 #define PISMO1_NAND_SIZE GPMC_SIZE_128M
257 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M
259 #define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors on */
261 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */
262 #define CONFIG_SYS_MONITOR_LEN SZ_256K /* Reserve 2 sectors */
264 #define CONFIG_SYS_FLASH_BASE boot_flash_base
266 /* Monitor at start of flash */
267 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
268 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
270 #define CONFIG_ENV_IS_IN_NAND 1
271 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
272 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
274 #define CONFIG_SYS_ENV_SECT_SIZE boot_flash_sec
275 #define CONFIG_ENV_OFFSET boot_flash_off
276 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
278 /*-----------------------------------------------------------------------
279 * CFI FLASH driver setup
281 /* timeout values are in ticks */
282 #define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
283 #define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
285 /* Flash banks JFFS2 should use */
286 #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
287 CONFIG_SYS_MAX_NAND_DEVICE)
288 #define CONFIG_SYS_JFFS2_MEM_NAND
289 /* use flash_info[2] */
290 #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
291 #define CONFIG_SYS_JFFS2_NUM_BANKS 1
294 extern gpmc_csx_t *nand_cs_base;
295 extern gpmc_t *gpmc_cfg_base;
296 extern unsigned int boot_flash_base;
297 extern volatile unsigned int boot_flash_env_addr;
298 extern unsigned int boot_flash_off;
299 extern unsigned int boot_flash_sec;
300 extern unsigned int boot_flash_type;
303 #endif /* __CONFIG_H */