1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2015 Freescale Semiconductor, Inc.
5 * Configuration settings for the Freescale i.MX7D SABRESD board.
8 #ifndef __MX7D_SABRESD_CONFIG_H
9 #define __MX7D_SABRESD_CONFIG_H
11 #include "mx7_common.h"
13 #define PHYS_SDRAM_SIZE SZ_1G
15 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
17 /* Size of malloc() pool */
18 #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
21 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
24 #define CONFIG_SYS_I2C_MXC
25 #define CONFIG_SYS_I2C_SPEED 100000
27 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
29 #ifdef CONFIG_IMX_BOOTAUX
30 /* Set to QSPI1 A flash at default */
31 #define CONFIG_SYS_AUXCORE_BOOTDATA 0x60000000
33 #define UPDATE_M4_ENV \
34 "m4image=m4_qspi.bin\0" \
35 "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
36 "update_m4_from_sd=" \
37 "if sf probe 0:0; then " \
38 "if run loadm4image; then " \
39 "setexpr fw_sz ${filesize} + 0xffff; " \
40 "setexpr fw_sz ${fw_sz} / 0x10000; " \
41 "setexpr fw_sz ${fw_sz} * 0x10000; " \
42 "sf erase 0x0 ${fw_sz}; " \
43 "sf write ${loadaddr} 0x0 ${filesize}; " \
46 "m4boot=sf probe 0:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
48 #define UPDATE_M4_ENV ""
51 #define CONFIG_MFG_ENV_SETTINGS \
52 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
54 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \
55 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
56 "g_mass_storage.iSerialNumber=\"\" "\
59 "initrd_addr=0x83800000\0" \
60 "initrd_high=0xffffffff\0" \
61 "bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
63 #define CONFIG_DFU_ENV_SETTINGS \
64 "dfu_alt_info=image raw 0 0x800000;"\
65 "u-boot raw 0 0x4000;"\
69 #define CONFIG_EXTRA_ENV_SETTINGS \
71 CONFIG_MFG_ENV_SETTINGS \
72 CONFIG_DFU_ENV_SETTINGS \
76 "fdt_high=0xffffffff\0" \
77 "initrd_high=0xffffffff\0" \
78 "fdt_file=imx7d-sdb.dtb\0" \
79 "fdt_addr=0x83000000\0" \
82 "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
83 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
84 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
85 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
86 "mmcautodetect=yes\0" \
87 "mmcargs=setenv bootargs console=${console},${baudrate} " \
90 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
91 "bootscript=echo Running bootscript from mmc ...; " \
93 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
94 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
95 "mmcboot=echo Booting from mmc ...; " \
97 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
98 "if run loadfdt; then " \
99 "bootz ${loadaddr} - ${fdt_addr}; " \
101 "if test ${boot_fdt} = try; then " \
104 "echo WARN: Cannot load the DT; " \
110 "netargs=setenv bootargs console=${console},${baudrate} " \
112 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
113 "netboot=echo Booting from net ...; " \
115 "if test ${ip_dyn} = yes; then " \
116 "setenv get_cmd dhcp; " \
118 "setenv get_cmd tftp; " \
120 "${get_cmd} ${image}; " \
121 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
122 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
123 "bootz ${loadaddr} - ${fdt_addr}; " \
125 "if test ${boot_fdt} = try; then " \
128 "echo WARN: Cannot load the DT; " \
135 #define CONFIG_BOOTCOMMAND \
136 "mmc dev ${mmcdev};" \
137 "mmc dev ${mmcdev}; if mmc rescan; then " \
138 "if run loadbootscript; then " \
141 "if run loadimage; then " \
143 "else run netboot; " \
146 "else run netboot; fi"
148 #define CONFIG_SYS_MEMTEST_START 0x80000000
149 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000)
151 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
152 #define CONFIG_SYS_HZ 1000
154 /* Physical Memory Map */
155 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
157 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
158 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
159 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
161 #define CONFIG_SYS_INIT_SP_OFFSET \
162 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
163 #define CONFIG_SYS_INIT_SP_ADDR \
164 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
166 /* environment organization */
169 * If want to use nand, define CONFIG_NAND_MXS and rework board
170 * to support nand, since emmc has pin conflicts with nand
172 #ifdef CONFIG_NAND_MXS
174 #define CONFIG_SYS_MAX_NAND_DEVICE 1
175 #define CONFIG_SYS_NAND_BASE 0x40000000
176 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
177 #define CONFIG_SYS_NAND_ONFI_DETECTION
179 /* DMA stuff, needed for GPMI/MXS NAND support */
182 #ifdef CONFIG_NAND_MXS
183 #define CONFIG_SYS_FSL_USDHC_NUM 1
185 #define CONFIG_SYS_FSL_USDHC_NUM 2
188 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */
189 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
190 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */
193 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
195 #define CONFIG_IMX_THERMAL
197 #define CONFIG_USBD_HS
200 #define CONFIG_VIDEO_MXS
201 #define CONFIG_VIDEO_LOGO
202 #define CONFIG_SPLASH_SCREEN
203 #define CONFIG_SPLASH_SCREEN_ALIGN
204 #define CONFIG_BMP_16BPP
205 #define CONFIG_VIDEO_BMP_RLE8
206 #define CONFIG_VIDEO_BMP_LOGO
209 #ifdef CONFIG_FSL_QSPI
210 #define CONFIG_SYS_FSL_QSPI_AHB
211 #define FSL_QSPI_FLASH_NUM 1
212 #define FSL_QSPI_FLASH_SIZE SZ_64M
213 #define QSPI0_BASE_ADDR QSPI1_IPS_BASE_ADDR
214 #define QSPI0_AMBA_BASE QSPI0_ARB_BASE_ADDR
217 #endif /* __CONFIG_H */