2 * Copyright (C) 2012 Freescale Semiconductor, Inc.
4 * Configuration settings for the Freescale i.MX6Q SabreSD board.
6 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef __MX6QSABRESD_CONFIG_H
10 #define __MX6QSABRESD_CONFIG_H
13 #define CONFIG_SPL_LIBCOMMON_SUPPORT
14 #define CONFIG_SPL_MMC_SUPPORT
18 #define CONFIG_MACH_TYPE 3980
19 #define CONFIG_MXC_UART_BASE UART1_BASE
20 #define CONFIG_CONSOLE_DEV "ttymxc0"
21 #define CONFIG_MMCROOT "/dev/mmcblk1p2"
22 #if defined(CONFIG_MX6Q)
23 #define CONFIG_DEFAULT_FDT_FILE "imx6q-sabresd.dtb"
24 #elif defined(CONFIG_MX6DL)
25 #define CONFIG_DEFAULT_FDT_FILE "imx6dl-sabresd.dtb"
27 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
29 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
31 #include "mx6sabre_common.h"
33 #define CONFIG_SYS_FSL_USDHC_NUM 3
34 #if defined(CONFIG_ENV_IS_IN_MMC)
35 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */
38 #define CONFIG_CMD_PCI
41 #define CONFIG_PCI_PNP
42 #define CONFIG_PCI_SCAN_SHOW
43 #define CONFIG_PCIE_IMX
44 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
45 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19)
49 #define CONFIG_CMD_I2C
50 #define CONFIG_SYS_I2C
51 #define CONFIG_SYS_I2C_MXC
52 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
53 #define CONFIG_SYS_I2C_SPEED 100000
57 #define CONFIG_POWER_I2C
58 #define CONFIG_POWER_PFUZE100
59 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
62 #define CONFIG_CMD_USB
64 #define CONFIG_USB_EHCI
65 #define CONFIG_USB_EHCI_MX6
66 #define CONFIG_USB_STORAGE
67 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
68 #define CONFIG_USB_HOST_ETHER
69 #define CONFIG_USB_ETHER_ASIX
70 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
71 #define CONFIG_MXC_USB_FLAGS 0
72 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */
75 #endif /* __MX6QSABRESD_CONFIG_H */