2 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
4 * Configuration settings for the Freescale i.MX6Q Sabre Lite board.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #define CONFIG_SYS_MX6_HCLK 24000000
27 #define CONFIG_SYS_MX6_CLK32 32768
28 #define CONFIG_DISPLAY_CPUINFO
29 #define CONFIG_DISPLAY_BOARDINFO
31 #include <asm/arch/imx-regs.h>
33 #define CONFIG_CMDLINE_TAG
34 #define CONFIG_SETUP_MEMORY_TAGS
35 #define CONFIG_INITRD_TAG
37 /* Size of malloc() pool */
38 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
40 #define CONFIG_ARCH_CPU_INIT
41 #define CONFIG_BOARD_EARLY_INIT_F
42 #define CONFIG_MXC_GPIO
44 #define CONFIG_MXC_UART
45 #define CONFIG_MXC_UART_BASE UART2_BASE
49 #define CONFIG_SPI_FLASH
50 #define CONFIG_SPI_FLASH_SST
51 #define CONFIG_MXC_SPI
52 #define CONFIG_SF_DEFAULT_BUS 0
53 #define CONFIG_SF_DEFAULT_CS (0|(GPIO_NUMBER(3, 19)<<8))
54 #define CONFIG_SF_DEFAULT_SPEED 25000000
55 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
59 #define CONFIG_FSL_ESDHC
60 #define CONFIG_FSL_USDHC
61 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
62 #define CONFIG_SYS_FSL_USDHC_NUM 2
65 #define CONFIG_CMD_MMC
66 #define CONFIG_GENERIC_MMC
67 #define CONFIG_CMD_FAT
68 #define CONFIG_DOS_PARTITION
70 #define CONFIG_CMD_PING
71 #define CONFIG_CMD_DHCP
72 #define CONFIG_CMD_MII
73 #define CONFIG_CMD_NET
74 #define CONFIG_FEC_MXC
76 #define IMX_FEC_BASE ENET_BASE_ADDR
77 #define CONFIG_FEC_XCV_TYPE RGMII
78 #define CONFIG_ETHPRIME "FEC"
79 #define CONFIG_FEC_MXC_PHYADDR 6
81 #define CONFIG_PHY_MICREL
84 #define CONFIG_CMD_USB
85 #define CONFIG_CMD_FAT
86 #define CONFIG_USB_EHCI
87 #define CONFIG_USB_EHCI_MX6
88 #define CONFIG_USB_STORAGE
89 #define CONFIG_USB_HOST_ETHER
90 #define CONFIG_USB_ETHER_ASIX
91 #define CONFIG_USB_ETHER_SMSC95XX
92 #define CONFIG_MXC_USB_PORT 1
93 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
94 #define CONFIG_MXC_USB_FLAGS 0
96 /* allow to overwrite serial and ethaddr */
97 #define CONFIG_ENV_OVERWRITE
98 #define CONFIG_CONS_INDEX 1
99 #define CONFIG_BAUDRATE 115200
100 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
102 /* Command definition */
103 #include <config_cmd_default.h>
105 #undef CONFIG_CMD_IMLS
107 #define CONFIG_BOOTDELAY 3
109 #define CONFIG_LOADADDR 0x10800000
110 #define CONFIG_SYS_TEXT_BASE 0x17800000
112 #define CONFIG_EXTRA_ENV_SETTINGS \
113 "script=boot.scr\0" \
115 "console=ttymxc3\0" \
116 "fdt_high=0xffffffff\0" \
117 "initrd_high=0xffffffff\0" \
120 "mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
121 "mmcargs=setenv bootargs console=${console},${baudrate} " \
122 "root=${mmcroot}\0" \
124 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
125 "bootscript=echo Running bootscript from mmc ...; " \
127 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
128 "mmcboot=echo Booting from mmc ...; " \
131 "netargs=setenv bootargs console=${console},${baudrate} " \
133 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
134 "netboot=echo Booting from net ...; " \
136 "dhcp ${uimage}; bootm\0" \
138 #define CONFIG_BOOTCOMMAND \
139 "mmc dev ${mmcdev};" \
140 "if mmc rescan ${mmcdev}; then " \
141 "if run loadbootscript; then " \
144 "if run loaduimage; then " \
146 "else run netboot; " \
149 "else run netboot; fi"
151 #define CONFIG_ARP_TIMEOUT 200UL
153 /* Miscellaneous configurable options */
154 #define CONFIG_SYS_LONGHELP
155 #define CONFIG_SYS_HUSH_PARSER
156 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
157 #define CONFIG_SYS_PROMPT "MX6QSABRELITE U-Boot > "
158 #define CONFIG_AUTO_COMPLETE
159 #define CONFIG_SYS_CBSIZE 256
161 /* Print Buffer Size */
162 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
163 #define CONFIG_SYS_MAXARGS 16
164 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
166 #define CONFIG_SYS_MEMTEST_START 0x10000000
167 #define CONFIG_SYS_MEMTEST_END 0x10010000
169 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
170 #define CONFIG_SYS_HZ 1000
172 #define CONFIG_CMDLINE_EDITING
173 #define CONFIG_STACKSIZE (128 * 1024)
175 /* Physical Memory Map */
176 #define CONFIG_NR_DRAM_BANKS 1
177 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
178 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
180 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
181 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
182 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
184 #define CONFIG_SYS_INIT_SP_OFFSET \
185 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
186 #define CONFIG_SYS_INIT_SP_ADDR \
187 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
189 /* FLASH and environment organization */
190 #define CONFIG_SYS_NO_FLASH
192 #define CONFIG_ENV_SIZE (8 * 1024)
194 #define CONFIG_ENV_IS_IN_MMC
195 /* #define CONFIG_ENV_IS_IN_SPI_FLASH */
197 #if defined(CONFIG_ENV_IS_IN_MMC)
198 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
199 #define CONFIG_SYS_MMC_ENV_DEV 0
200 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
201 #define CONFIG_ENV_OFFSET (768 * 1024)
202 #define CONFIG_ENV_SECT_SIZE (8 * 1024)
203 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
204 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
205 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
206 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
209 #define CONFIG_OF_LIBFDT
211 #endif /* __CONFIG_H */