2 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
4 * Configuration settings for the Freescale i.MX6Q Sabre Lite board.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #define CONFIG_SYS_MX6_HCLK 24000000
27 #define CONFIG_SYS_MX6_CLK32 32768
28 #define CONFIG_DISPLAY_CPUINFO
29 #define CONFIG_DISPLAY_BOARDINFO
31 #define CONFIG_MACH_TYPE 3769
33 #include <asm/arch/imx-regs.h>
34 #include <asm/imx-common/gpio.h>
36 #define CONFIG_CMDLINE_TAG
37 #define CONFIG_SETUP_MEMORY_TAGS
38 #define CONFIG_INITRD_TAG
39 #define CONFIG_REVISION_TAG
41 /* Size of malloc() pool */
42 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
44 #define CONFIG_BOARD_EARLY_INIT_F
45 #define CONFIG_MISC_INIT_R
46 #define CONFIG_MXC_GPIO
48 #define CONFIG_MXC_UART
49 #define CONFIG_MXC_UART_BASE UART2_BASE
53 #define CONFIG_SPI_FLASH
54 #define CONFIG_SPI_FLASH_SST
55 #define CONFIG_MXC_SPI
56 #define CONFIG_SF_DEFAULT_BUS 0
57 #define CONFIG_SF_DEFAULT_CS (0|(IMX_GPIO_NR(3, 19)<<8))
58 #define CONFIG_SF_DEFAULT_SPEED 25000000
59 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
63 #define CONFIG_CMD_I2C
64 #define CONFIG_I2C_MULTI_BUS
65 #define CONFIG_I2C_MXC
66 #define CONFIG_SYS_I2C_SPEED 100000
69 #define CONFIG_FSL_ESDHC
70 #define CONFIG_FSL_USDHC
71 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
72 #define CONFIG_SYS_FSL_USDHC_NUM 2
75 #define CONFIG_CMD_MMC
76 #define CONFIG_GENERIC_MMC
77 #define CONFIG_CMD_EXT2
78 #define CONFIG_CMD_FAT
79 #define CONFIG_DOS_PARTITION
81 #define CONFIG_CMD_SATA
85 #ifdef CONFIG_CMD_SATA
86 #define CONFIG_DWC_AHSATA
87 #define CONFIG_SYS_SATA_MAX_DEVICE 1
88 #define CONFIG_DWC_AHSATA_PORT_ID 0
89 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
94 #define CONFIG_CMD_PING
95 #define CONFIG_CMD_DHCP
96 #define CONFIG_CMD_MII
97 #define CONFIG_CMD_NET
98 #define CONFIG_FEC_MXC
100 #define IMX_FEC_BASE ENET_BASE_ADDR
101 #define CONFIG_FEC_XCV_TYPE RGMII
102 #define CONFIG_ETHPRIME "FEC"
103 #define CONFIG_FEC_MXC_PHYADDR 6
104 #define CONFIG_PHYLIB
105 #define CONFIG_PHY_MICREL
106 #define CONFIG_PHY_MICREL_KSZ9021
109 #define CONFIG_CMD_USB
110 #define CONFIG_CMD_FAT
111 #define CONFIG_USB_EHCI
112 #define CONFIG_USB_EHCI_MX6
113 #define CONFIG_USB_STORAGE
114 #define CONFIG_USB_HOST_ETHER
115 #define CONFIG_USB_ETHER_ASIX
116 #define CONFIG_USB_ETHER_SMSC95XX
117 #define CONFIG_MXC_USB_PORT 1
118 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
119 #define CONFIG_MXC_USB_FLAGS 0
121 /* Miscellaneous commands */
122 #define CONFIG_CMD_BMODE
124 /* allow to overwrite serial and ethaddr */
125 #define CONFIG_ENV_OVERWRITE
126 #define CONFIG_CONS_INDEX 1
127 #define CONFIG_BAUDRATE 115200
129 /* Command definition */
130 #include <config_cmd_default.h>
132 #undef CONFIG_CMD_IMLS
134 #define CONFIG_BOOTDELAY 3
136 #define CONFIG_PREBOOT ""
138 #define CONFIG_LOADADDR 0x10800000
139 #define CONFIG_SYS_TEXT_BASE 0x17800000
141 #define CONFIG_EXTRA_ENV_SETTINGS \
142 "script=boot.scr\0" \
144 "console=ttymxc1\0" \
145 "fdt_high=0xffffffff\0" \
146 "initrd_high=0xffffffff\0" \
149 "mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
150 "mmcargs=setenv bootargs console=${console},${baudrate} " \
151 "root=${mmcroot}\0" \
153 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
154 "bootscript=echo Running bootscript from mmc ...; " \
156 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
157 "mmcboot=echo Booting from mmc ...; " \
160 "netargs=setenv bootargs console=${console},${baudrate} " \
162 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
163 "netboot=echo Booting from net ...; " \
165 "dhcp ${uimage}; bootm\0" \
167 #define CONFIG_BOOTCOMMAND \
168 "mmc dev ${mmcdev};" \
169 "if mmc rescan ${mmcdev}; then " \
170 "if run loadbootscript; then " \
173 "if run loaduimage; then " \
175 "else run netboot; " \
178 "else run netboot; fi"
180 #define CONFIG_ARP_TIMEOUT 200UL
182 /* Miscellaneous configurable options */
183 #define CONFIG_SYS_LONGHELP
184 #define CONFIG_SYS_HUSH_PARSER
185 #define CONFIG_SYS_PROMPT "MX6QSABRELITE U-Boot > "
186 #define CONFIG_AUTO_COMPLETE
187 #define CONFIG_SYS_CBSIZE 256
189 /* Print Buffer Size */
190 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
191 #define CONFIG_SYS_MAXARGS 16
192 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
194 #define CONFIG_SYS_MEMTEST_START 0x10000000
195 #define CONFIG_SYS_MEMTEST_END 0x10010000
197 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
198 #define CONFIG_SYS_HZ 1000
200 #define CONFIG_CMDLINE_EDITING
202 /* Physical Memory Map */
203 #define CONFIG_NR_DRAM_BANKS 1
204 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
205 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
207 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
208 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
209 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
211 #define CONFIG_SYS_INIT_SP_OFFSET \
212 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
213 #define CONFIG_SYS_INIT_SP_ADDR \
214 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
216 /* FLASH and environment organization */
217 #define CONFIG_SYS_NO_FLASH
219 #define CONFIG_ENV_SIZE (8 * 1024)
221 #define CONFIG_ENV_IS_IN_MMC
222 /* #define CONFIG_ENV_IS_IN_SPI_FLASH */
224 #if defined(CONFIG_ENV_IS_IN_MMC)
225 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
226 #define CONFIG_SYS_MMC_ENV_DEV 0
227 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
228 #define CONFIG_ENV_OFFSET (768 * 1024)
229 #define CONFIG_ENV_SECT_SIZE (8 * 1024)
230 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
231 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
232 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
233 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
236 #define CONFIG_OF_LIBFDT
237 #define CONFIG_CMD_BOOTZ
239 #define CONFIG_SYS_DCACHE_OFF
241 #ifndef CONFIG_SYS_DCACHE_OFF
242 #define CONFIG_CMD_CACHE
245 #endif /* __CONFIG_H */