2 * Copyright (C) 2010 Freescale Semiconductor, Inc.
4 * Configuration settings for the MX53-EVK Freescale board.
6 * SPDX-License-Identifier: GPL-2.0+
14 #define CONFIG_DISPLAY_BOARDINFO
16 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_EVK
18 #include <asm/arch/imx-regs.h>
20 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
21 #define CONFIG_SETUP_MEMORY_TAGS
22 #define CONFIG_INITRD_TAG
23 #define CONFIG_REVISION_TAG
25 #define CONFIG_SYS_FSL_CLK
27 /* Size of malloc() pool */
28 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
30 #define CONFIG_BOARD_EARLY_INIT_F
31 #define CONFIG_BOARD_LATE_INIT
32 #define CONFIG_MXC_GPIO
34 #define CONFIG_MXC_UART
35 #define CONFIG_MXC_UART_BASE UART1_BASE
38 #define CONFIG_SYS_I2C
39 #define CONFIG_SYS_I2C_MXC
40 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
41 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
42 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
46 #define CONFIG_POWER_I2C
47 #define CONFIG_POWER_FSL
48 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 8
49 #define CONFIG_POWER_FSL_MC13892
50 #define CONFIG_RTC_MC13XXX
53 #define CONFIG_FSL_ESDHC
54 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
55 #define CONFIG_SYS_FSL_ESDHC_NUM 2
58 #define CONFIG_GENERIC_MMC
59 #define CONFIG_DOS_PARTITION
64 #define CONFIG_FEC_MXC
65 #define IMX_FEC_BASE FEC_BASE_ADDR
66 #define CONFIG_FEC_MXC_PHYADDR 0x1F
68 #define CONFIG_CMD_DATE
70 /* Miscellaneous commands */
71 #define CONFIG_CMD_BMODE
73 /* allow to overwrite serial and ethaddr */
74 #define CONFIG_ENV_OVERWRITE
75 #define CONFIG_CONS_INDEX 1
76 #define CONFIG_BAUDRATE 115200
78 /* Command definition */
80 #define CONFIG_ETHPRIME "FEC0"
82 #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
83 #define CONFIG_SYS_TEXT_BASE 0x77800000
85 #define CONFIG_EXTRA_ENV_SETTINGS \
90 "mmcroot=/dev/mmcblk0p3 rw\0" \
91 "mmcrootfstype=ext3 rootwait\0" \
92 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
94 "rootfstype=${mmcrootfstype}\0" \
96 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
97 "bootscript=echo Running bootscript from mmc ...; " \
99 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
100 "mmcboot=echo Booting from mmc ...; " \
103 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
105 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
106 "netboot=echo Booting from net ...; " \
108 "dhcp ${uimage}; bootm\0" \
110 #define CONFIG_BOOTCOMMAND \
111 "mmc dev ${mmcdev}; if mmc rescan; then " \
112 "if run loadbootscript; then " \
115 "if run loaduimage; then " \
117 "else run netboot; " \
120 "else run netboot; fi"
122 #define CONFIG_ARP_TIMEOUT 200UL
124 /* Miscellaneous configurable options */
125 #define CONFIG_SYS_LONGHELP /* undef to save memory */
126 #define CONFIG_AUTO_COMPLETE
127 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
129 /* Print Buffer Size */
130 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
131 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
132 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
134 #define CONFIG_SYS_MEMTEST_START 0x70000000
135 #define CONFIG_SYS_MEMTEST_END 0x70010000
137 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
139 #define CONFIG_CMDLINE_EDITING
141 /* Physical Memory Map */
142 #define CONFIG_NR_DRAM_BANKS 1
143 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
144 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
146 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
147 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
148 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
150 #define CONFIG_SYS_INIT_SP_OFFSET \
151 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
152 #define CONFIG_SYS_INIT_SP_ADDR \
153 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
155 /* FLASH and environment organization */
156 #define CONFIG_SYS_NO_FLASH
158 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
159 #define CONFIG_ENV_SIZE (8 * 1024)
160 #define CONFIG_ENV_IS_IN_MMC
161 #define CONFIG_SYS_MMC_ENV_DEV 0
163 #endif /* __CONFIG_H */