2 * Copyright (C) 2011 Freescale Semiconductor, Inc.
4 * Configuration settings for the MX53ARD Freescale board.
6 * SPDX-License-Identifier: GPL-2.0+
14 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_ARD
16 #include <asm/arch/imx-regs.h>
18 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
19 #define CONFIG_SETUP_MEMORY_TAGS
20 #define CONFIG_INITRD_TAG
21 #define CONFIG_REVISION_TAG
23 #define CONFIG_SYS_FSL_CLK
25 /* Size of malloc() pool */
26 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
28 #define CONFIG_MXC_GPIO
30 #define CONFIG_SYS_MAX_NAND_DEVICE 1
31 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
32 #define CONFIG_NAND_MXC
33 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
34 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
35 #define CONFIG_SYS_NAND_LARGEPAGE
36 #define CONFIG_MXC_NAND_HWECC
37 #define CONFIG_SYS_NAND_USE_FLASH_BBT
38 #define CONFIG_CMD_NAND
40 #define CONFIG_MXC_UART
41 #define CONFIG_MXC_UART_BASE UART1_BASE
44 #define CONFIG_SYS_I2C
45 #define CONFIG_SYS_I2C_MXC
46 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
47 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
48 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
51 #define CONFIG_FSL_ESDHC
52 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
53 #define CONFIG_SYS_FSL_ESDHC_NUM 2
55 #define CONFIG_GENERIC_MMC
58 #define CONFIG_HAS_ETH1
61 /* allow to overwrite serial and ethaddr */
62 #define CONFIG_ENV_OVERWRITE
63 #define CONFIG_CONS_INDEX 1
64 #define CONFIG_BAUDRATE 115200
66 /* Command definition */
68 #define CONFIG_ETHPRIME "smc911x"
71 #define CONFIG_SMC911X
72 #define CONFIG_SMC911X_16_BIT
73 #define CONFIG_SMC911X_BASE CS1_BASE_ADDR
75 #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */
76 #define CONFIG_SYS_TEXT_BASE 0x77800000
78 #define CONFIG_EXTRA_ENV_SETTINGS \
82 "fdt_high=0xffffffff\0" \
83 "initrd_high=0xffffffff\0" \
84 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
85 "fdt_addr=0x78000000\0" \
88 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
90 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
91 "update_sd_firmware_filename=u-boot.imx\0" \
92 "update_sd_firmware=" \
93 "if test ${ip_dyn} = yes; then " \
94 "setenv get_cmd dhcp; " \
96 "setenv get_cmd tftp; " \
98 "if mmc dev ${mmcdev}; then " \
99 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
100 "setexpr fw_sz ${filesize} / 0x200; " \
101 "setexpr fw_sz ${fw_sz} + 1; " \
102 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
105 "mmcargs=setenv bootargs console=${console},${baudrate} " \
106 "root=${mmcroot}\0" \
108 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
109 "bootscript=echo Running bootscript from mmc ...; " \
111 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
112 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
113 "mmcboot=echo Booting from mmc ...; " \
115 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
116 "if run loadfdt; then " \
117 "bootz ${loadaddr} - ${fdt_addr}; " \
119 "if test ${boot_fdt} = try; then " \
122 "echo WARN: Cannot load the DT; " \
128 "netargs=setenv bootargs console=${console},${baudrate} " \
130 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
131 "netboot=echo Booting from net ...; " \
133 "if test ${ip_dyn} = yes; then " \
134 "setenv get_cmd dhcp; " \
136 "setenv get_cmd tftp; " \
138 "${get_cmd} ${uimage}; " \
139 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
140 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
141 "bootz ${loadaddr} - ${fdt_addr}; " \
143 "if test ${boot_fdt} = try; then " \
146 "echo WARN: Cannot load the DT; " \
153 #define CONFIG_BOOTCOMMAND \
154 "mmc dev ${mmcdev}; if mmc rescan; then " \
155 "if run loadbootscript; then " \
158 "if run loaduimage; then " \
160 "else run netboot; " \
163 "else run netboot; fi"
165 #define CONFIG_ARP_TIMEOUT 200UL
167 /* Miscellaneous configurable options */
168 #define CONFIG_SYS_LONGHELP /* undef to save memory */
169 #define CONFIG_AUTO_COMPLETE
170 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
172 /* Print Buffer Size */
173 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
174 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
175 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
177 #define CONFIG_SYS_MEMTEST_START 0x70000000
178 #define CONFIG_SYS_MEMTEST_END 0x70010000
180 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
182 #define CONFIG_CMDLINE_EDITING
184 /* Physical Memory Map */
185 #define CONFIG_NR_DRAM_BANKS 2
186 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
187 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
188 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
189 #define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
190 #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
192 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
193 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
194 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
196 #define CONFIG_SYS_INIT_SP_OFFSET \
197 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
198 #define CONFIG_SYS_INIT_SP_ADDR \
199 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
201 /* FLASH and environment organization */
202 #define CONFIG_SYS_NO_FLASH
204 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
205 #define CONFIG_ENV_SIZE (8 * 1024)
206 #define CONFIG_ENV_IS_IN_MMC
207 #define CONFIG_SYS_MMC_ENV_DEV 0
209 #define MX53ARD_CS1GCR1 (CSEN | DSZ(2))
210 #define MX53ARD_CS1RCR1 (RCSN(2) | OEN (1) | RWSC(22))
211 #define MX53ARD_CS1RCR2 RBEN(2)
212 #define MX53ARD_CS1WCR1 (WCSN(2) | WEN(2) | WBEN(2) | WWSC(22))
214 #endif /* __CONFIG_H */