1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2011 Freescale Semiconductor, Inc.
5 * Configuration settings for the MX53ARD Freescale board.
11 #define CONFIG_MACH_TYPE MACH_TYPE_MX53_ARD
13 #include <asm/arch/imx-regs.h>
15 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
16 #define CONFIG_SETUP_MEMORY_TAGS
17 #define CONFIG_INITRD_TAG
18 #define CONFIG_REVISION_TAG
20 #define CONFIG_SYS_FSL_CLK
22 /* Size of malloc() pool */
23 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
25 #define CONFIG_SYS_MAX_NAND_DEVICE 1
26 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
27 #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
28 #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
29 #define CONFIG_SYS_NAND_LARGEPAGE
30 #define CONFIG_MXC_NAND_HWECC
32 #define CONFIG_MXC_UART
33 #define CONFIG_MXC_UART_BASE UART1_BASE
36 #define CONFIG_SYS_I2C
37 #define CONFIG_SYS_I2C_MXC
38 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
39 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
40 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
43 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
44 #define CONFIG_SYS_FSL_ESDHC_NUM 2
47 #define CONFIG_HAS_ETH1
49 /* allow to overwrite serial and ethaddr */
50 #define CONFIG_ENV_OVERWRITE
52 /* Command definition */
54 #define CONFIG_ETHPRIME "smc911x"
56 #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */
58 #define CONFIG_EXTRA_ENV_SETTINGS \
62 "fdt_high=0xffffffff\0" \
63 "initrd_high=0xffffffff\0" \
64 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
65 "fdt_addr=0x78000000\0" \
68 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
70 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
71 "update_sd_firmware_filename=u-boot.imx\0" \
72 "update_sd_firmware=" \
73 "if test ${ip_dyn} = yes; then " \
74 "setenv get_cmd dhcp; " \
76 "setenv get_cmd tftp; " \
78 "if mmc dev ${mmcdev}; then " \
79 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
80 "setexpr fw_sz ${filesize} / 0x200; " \
81 "setexpr fw_sz ${fw_sz} + 1; " \
82 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
85 "mmcargs=setenv bootargs console=${console},${baudrate} " \
88 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
89 "bootscript=echo Running bootscript from mmc ...; " \
91 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
92 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
93 "mmcboot=echo Booting from mmc ...; " \
95 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
96 "if run loadfdt; then " \
97 "bootz ${loadaddr} - ${fdt_addr}; " \
99 "if test ${boot_fdt} = try; then " \
102 "echo WARN: Cannot load the DT; " \
108 "netargs=setenv bootargs console=${console},${baudrate} " \
110 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
111 "netboot=echo Booting from net ...; " \
113 "if test ${ip_dyn} = yes; then " \
114 "setenv get_cmd dhcp; " \
116 "setenv get_cmd tftp; " \
118 "${get_cmd} ${uimage}; " \
119 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
120 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
121 "bootz ${loadaddr} - ${fdt_addr}; " \
123 "if test ${boot_fdt} = try; then " \
126 "echo WARN: Cannot load the DT; " \
133 #define CONFIG_BOOTCOMMAND \
134 "mmc dev ${mmcdev}; if mmc rescan; then " \
135 "if run loadbootscript; then " \
138 "if run loaduimage; then " \
140 "else run netboot; " \
143 "else run netboot; fi"
145 #define CONFIG_ARP_TIMEOUT 200UL
147 /* Miscellaneous configurable options */
149 #define CONFIG_SYS_MEMTEST_START 0x70000000
150 #define CONFIG_SYS_MEMTEST_END 0x70010000
152 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
154 /* Physical Memory Map */
155 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
156 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
157 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
158 #define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
159 #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
161 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
162 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
163 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
165 #define CONFIG_SYS_INIT_SP_OFFSET \
166 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
167 #define CONFIG_SYS_INIT_SP_ADDR \
168 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
170 /* environment organization */
171 #define CONFIG_SYS_MMC_ENV_DEV 0
173 #define MX53ARD_CS1GCR1 (CSEN | DSZ(2))
174 #define MX53ARD_CS1RCR1 (RCSN(2) | OEN (1) | RWSC(22))
175 #define MX53ARD_CS1RCR2 RBEN(2)
176 #define MX53ARD_CS1WCR1 (WCSN(2) | WEN(2) | WBEN(2) | WWSC(22))
178 #endif /* __CONFIG_H */