2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
4 * (C) Copyright 2009 Freescale Semiconductor, Inc.
6 * Configuration settings for the MX51EVK Board
8 * SPDX-License-Identifier: GPL-2.0+
14 /* High Level Configuration Options */
16 #define CONFIG_MX51 /* in a mx51 */
18 #define CONFIG_SYS_FSL_CLK
19 #define CONFIG_SYS_TEXT_BASE 0x97800000
21 #include <asm/arch/imx-regs.h>
23 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
24 #define CONFIG_SETUP_MEMORY_TAGS
25 #define CONFIG_INITRD_TAG
26 #define CONFIG_REVISION_TAG
28 #define CONFIG_MACH_TYPE MACH_TYPE_MX51_BABBAGE
30 * Size of malloc() pool
32 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
34 #define CONFIG_BOARD_LATE_INIT
39 #define CONFIG_FSL_IIM
40 #define CONFIG_CMD_FUSE
42 #define CONFIG_MXC_UART
43 #define CONFIG_MXC_UART_BASE UART1_BASE
44 #define CONFIG_MXC_GPIO
50 #define CONFIG_MXC_SPI
54 #define CONFIG_POWER_SPI
55 #define CONFIG_POWER_FSL
56 #define CONFIG_FSL_PMIC_BUS 0
57 #define CONFIG_FSL_PMIC_CS 0
58 #define CONFIG_FSL_PMIC_CLK 2500000
59 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
60 #define CONFIG_FSL_PMIC_BITLEN 32
61 #define CONFIG_RTC_MC13XXX
66 #define CONFIG_FSL_ESDHC
67 #define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR
68 #define CONFIG_SYS_FSL_ESDHC_NUM 2
72 #define CONFIG_GENERIC_MMC
73 #define CONFIG_DOS_PARTITION
80 #define CONFIG_FEC_MXC
81 #define IMX_FEC_BASE FEC_BASE_ADDR
82 #define CONFIG_FEC_MXC_PHYADDR 0x1F
85 #define CONFIG_USB_EHCI
86 #define CONFIG_USB_EHCI_MX5
87 #define CONFIG_USB_HOST_ETHER
88 #define CONFIG_USB_ETHER_ASIX
89 #define CONFIG_USB_ETHER_SMSC95XX
90 #define CONFIG_MXC_USB_PORT 1
91 #define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI
92 #define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED
94 /* Framebuffer and LCD */
95 #define CONFIG_PREBOOT
97 #define CONFIG_VIDEO_IPUV3
98 #define CONFIG_CFB_CONSOLE
99 #define CONFIG_VGA_AS_SINGLE_DEVICE
100 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
101 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
102 #define CONFIG_VIDEO_BMP_RLE8
103 #define CONFIG_SPLASH_SCREEN
104 #define CONFIG_BMP_16BPP
105 #define CONFIG_VIDEO_LOGO
106 #define CONFIG_IPUV3_CLK 133000000
108 /* allow to overwrite serial and ethaddr */
109 #define CONFIG_ENV_OVERWRITE
110 #define CONFIG_CONS_INDEX 1
111 #define CONFIG_BAUDRATE 115200
113 /***********************************************************
115 ***********************************************************/
117 #define CONFIG_CMD_DATE
120 #define CONFIG_ETHPRIME "FEC0"
122 #define CONFIG_LOADADDR 0x92000000 /* loadaddr env var */
124 #define CONFIG_EXTRA_ENV_SETTINGS \
125 "script=boot.scr\0" \
127 "fdt_file=imx51-babbage.dtb\0" \
128 "fdt_addr=0x91000000\0" \
133 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
134 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
135 "root=${mmcroot}\0" \
137 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
138 "bootscript=echo Running bootscript from mmc ...; " \
140 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
141 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
142 "mmcboot=echo Booting from mmc ...; " \
144 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
145 "if run loadfdt; then " \
146 "bootz ${loadaddr} - ${fdt_addr}; " \
148 "if test ${boot_fdt} = try; then " \
151 "echo WARN: Cannot load the DT; " \
157 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
159 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
160 "netboot=echo Booting from net ...; " \
162 "if test ${ip_dyn} = yes; then " \
163 "setenv get_cmd dhcp; " \
165 "setenv get_cmd tftp; " \
167 "${get_cmd} ${image}; " \
168 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
169 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
170 "bootz ${loadaddr} - ${fdt_addr}; " \
172 "if test ${boot_fdt} = try; then " \
175 "echo ERROR: Cannot load the DT; " \
183 #define CONFIG_BOOTCOMMAND \
184 "mmc dev ${mmcdev}; if mmc rescan; then " \
185 "if run loadbootscript; then " \
188 "if run loadimage; then " \
190 "else run netboot; " \
193 "else run netboot; fi"
195 #define CONFIG_ARP_TIMEOUT 200UL
198 * Miscellaneous configurable options
200 #define CONFIG_SYS_LONGHELP /* undef to save memory */
201 #define CONFIG_AUTO_COMPLETE
202 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
203 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
204 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
206 #define CONFIG_SYS_MEMTEST_START 0x90000000
207 #define CONFIG_SYS_MEMTEST_END 0x90010000
209 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
211 #define CONFIG_CMDLINE_EDITING
213 /*-----------------------------------------------------------------------
214 * Physical Memory Map
216 #define CONFIG_NR_DRAM_BANKS 1
217 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
218 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
220 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
221 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
222 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
224 #define CONFIG_BOARD_EARLY_INIT_F
226 #define CONFIG_SYS_INIT_SP_OFFSET \
227 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
228 #define CONFIG_SYS_INIT_SP_ADDR \
229 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
231 #define CONFIG_SYS_DDR_CLKSEL 0
232 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100
233 #define CONFIG_SYS_MAIN_PWR_ON
235 /*-----------------------------------------------------------------------
236 * FLASH and environment organization
238 #define CONFIG_SYS_NO_FLASH
240 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
241 #define CONFIG_ENV_SIZE (8 * 1024)
242 #define CONFIG_ENV_IS_IN_MMC
243 #define CONFIG_SYS_MMC_ENV_DEV 0