df455bfa4768fca63599cfc49cde3d3f0f8323c9
[oweals/u-boot.git] / include / configs / mx35pdk.h
1 /*
2  * (C) Copyright 2010, Stefano Babic <sbabic@denx.de>
3  *
4  * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
5  *
6  * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
7  *
8  * Configuration for the MX35pdk Freescale board.
9  *
10  * SPDX-License-Identifier:     GPL-2.0+
11  */
12
13 #ifndef __CONFIG_H
14 #define __CONFIG_H
15
16 #include <asm/arch/imx-regs.h>
17
18  /* High Level Configuration Options */
19 #define CONFIG_MX35
20
21 #define CONFIG_SYS_FSL_CLK
22
23 /* Set TEXT at the beginning of the NOR flash */
24 #define CONFIG_SYS_TEXT_BASE    0xA0000000
25
26 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
27 #define CONFIG_REVISION_TAG
28 #define CONFIG_SETUP_MEMORY_TAGS
29 #define CONFIG_INITRD_TAG
30
31 /*
32  * Size of malloc() pool
33  */
34 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 1024 * 1024)
35
36 /*
37  * Hardware drivers
38  */
39 #define CONFIG_SYS_I2C
40 #define CONFIG_SYS_I2C_MXC
41 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
42 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
43 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
44 #define CONFIG_MXC_SPI
45
46 /*
47  * PMIC Configs
48  */
49 #define CONFIG_POWER
50 #define CONFIG_POWER_I2C
51 #define CONFIG_POWER_FSL
52 #define CONFIG_POWER_FSL_MC13892
53 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR    0x08
54 #define CONFIG_RTC_MC13XXX
55
56 /*
57  * MFD MC9SDZ60
58  */
59 #define CONFIG_FSL_MC9SDZ60
60 #define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR        0x69
61
62 /*
63  * UART (console)
64  */
65 #define CONFIG_MXC_UART
66 #define CONFIG_MXC_UART_BASE    UART1_BASE
67
68 /* allow to overwrite serial and ethaddr */
69 #define CONFIG_ENV_OVERWRITE
70 #define CONFIG_CONS_INDEX       1
71
72 /*
73  * Command definition
74  */
75 #define CONFIG_BOOTP_SUBNETMASK
76 #define CONFIG_BOOTP_GATEWAY
77 #define CONFIG_BOOTP_DNS
78
79 #define CONFIG_NET_RETRY_COUNT  100
80
81
82 #define CONFIG_LOADADDR         0x80800000      /* loadaddr env var */
83
84 /*
85  * Ethernet on the debug board (SMC911)
86  */
87 #define CONFIG_HAS_ETH1
88 #define CONFIG_ETHPRIME
89
90 /*
91  * Ethernet on SOC (FEC)
92  */
93 #define CONFIG_FEC_MXC
94 #define IMX_FEC_BASE    FEC_BASE_ADDR
95 #define CONFIG_FEC_MXC_PHYADDR  0x1F
96
97 #define CONFIG_MII
98
99 #define CONFIG_ARP_TIMEOUT      200UL
100
101 /*
102  * Miscellaneous configurable options
103  */
104 #define CONFIG_SYS_LONGHELP     /* undef to save memory */
105 #define CONFIG_CMDLINE_EDITING
106
107 #define CONFIG_AUTO_COMPLETE
108
109 #define CONFIG_SYS_MEMTEST_START        0       /* memtest works on */
110 #define CONFIG_SYS_MEMTEST_END          0x10000
111
112 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
113
114 /*
115  * Physical Memory Map
116  */
117 #define CONFIG_NR_DRAM_BANKS    2
118 #define PHYS_SDRAM_1            CSD0_BASE_ADDR
119 #define PHYS_SDRAM_1_SIZE       (128 * 1024 * 1024)
120 #define PHYS_SDRAM_2            CSD1_BASE_ADDR
121 #define PHYS_SDRAM_2_SIZE       (128 * 1024 * 1024)
122
123 #define CONFIG_SYS_SDRAM_BASE           CSD0_BASE_ADDR
124 #define CONFIG_SYS_INIT_RAM_ADDR        (IRAM_BASE_ADDR + 0x10000)
125 #define CONFIG_SYS_INIT_RAM_SIZE                (IRAM_SIZE / 2)
126 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
127                                         GENERATED_GBL_DATA_SIZE)
128 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
129                                         CONFIG_SYS_GBL_DATA_OFFSET)
130
131 /*
132  * MTD Command for mtdparts
133  */
134 #define CONFIG_MTD_DEVICE
135 #define CONFIG_FLASH_CFI_MTD
136 #define CONFIG_MTD_PARTITIONS
137
138 /*
139  * FLASH and environment organization
140  */
141 #define CONFIG_SYS_FLASH_BASE           CS0_BASE_ADDR
142 #define CONFIG_SYS_MAX_FLASH_BANKS 1    /* max number of memory banks */
143 #define CONFIG_SYS_MAX_FLASH_SECT 512   /* max number of sectors on one chip */
144 /* Monitor at beginning of flash */
145 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
146 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
147
148 #define CONFIG_ENV_SECT_SIZE    (128 * 1024)
149 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
150
151 /* Address and size of Redundant Environment Sector     */
152 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
153 #define CONFIG_ENV_SIZE_REDUND  CONFIG_ENV_SIZE
154
155 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE + \
156                                 CONFIG_SYS_MONITOR_LEN)
157
158 #if defined(CONFIG_FSL_ENV_IN_NAND)
159         #define CONFIG_ENV_OFFSET       (1024 * 1024)
160 #endif
161
162 /*
163  * CFI FLASH driver setup
164  */
165 #define CONFIG_SYS_FLASH_CFI            /* Flash memory is CFI compliant */
166 #define CONFIG_FLASH_CFI_DRIVER
167
168 /* A non-standard buffered write algorithm */
169 #define CONFIG_FLASH_SPANSION_S29WS_N
170 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE       /* faster */
171 #define CONFIG_SYS_FLASH_PROTECTION     /* Use hardware sector protection */
172
173 /*
174  * NAND FLASH driver setup
175  */
176 #define CONFIG_MXC_NAND_REGS_BASE       (NFC_BASE_ADDR)
177 #define CONFIG_SYS_MAX_NAND_DEVICE      1
178 #define CONFIG_SYS_NAND_BASE            (NFC_BASE_ADDR)
179 #define CONFIG_MXC_NAND_HWECC
180 #define CONFIG_SYS_NAND_LARGEPAGE
181
182 /* EHCI driver */
183 #define CONFIG_EHCI_IS_TDI
184 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
185 #define CONFIG_USB_EHCI_MXC
186 #define CONFIG_MXC_USB_PORT     0
187 #define CONFIG_MXC_USB_FLAGS    (MXC_EHCI_INTERFACE_DIFF_UNI | \
188                                  MXC_EHCI_POWER_PINS_ENABLED | \
189                                  MXC_EHCI_OC_PIN_ACTIVE_LOW)
190 #define CONFIG_MXC_USB_PORTSC   (MXC_EHCI_UTMI_16BIT | MXC_EHCI_MODE_UTMI)
191
192 /* mmc driver */
193 #define CONFIG_FSL_ESDHC
194 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
195 #define CONFIG_SYS_FSL_ESDHC_NUM        1
196
197 /*
198  * Default environment and default scripts
199  * to update uboot and load kernel
200  */
201
202 #define CONFIG_HOSTNAME "mx35pdk"
203 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
204         "netdev=eth1\0"                                                 \
205         "ethprime=smc911x\0"                                            \
206         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
207                 "nfsroot=${serverip}:${rootpath}\0"                     \
208         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
209         "addip_sta=setenv bootargs ${bootargs} "                        \
210                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
211                 ":${hostname}:${netdev}:off panic=1\0"                  \
212         "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"               \
213         "addip=if test -n ${ipdyn};then run addip_dyn;"                 \
214                 "else run addip_sta;fi\0"                               \
215         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
216         "addtty=setenv bootargs ${bootargs}"                            \
217                 " console=ttymxc0,${baudrate}\0"                        \
218         "addmisc=setenv bootargs ${bootargs} ${misc}\0"                 \
219         "loadaddr=80800000\0"                                           \
220         "kernel_addr_r=80800000\0"                                      \
221         "hostname=" __stringify(CONFIG_HOSTNAME) "\0"                   \
222         "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0"            \
223         "ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0"      \
224         "flash_self=run ramargs addip addtty addmtd addmisc;"           \
225                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
226         "flash_nfs=run nfsargs addip addtty addmtd addmisc;"            \
227                 "bootm ${kernel_addr}\0"                                \
228         "net_nfs=tftp ${kernel_addr_r} ${bootfile}; "                   \
229                 "run nfsargs addip addtty addmtd addmisc;"              \
230                 "bootm ${kernel_addr_r}\0"                              \
231         "net_self_load=tftp ${kernel_addr_r} ${bootfile};"              \
232                 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0"             \
233         "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0"          \
234         "load=tftp ${loadaddr} ${u-boot}\0"                             \
235         "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0"         \
236         "update=protect off ${uboot_addr} +80000;"                      \
237                 "erase ${uboot_addr} +80000;"                           \
238                 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0"          \
239         "upd=if run load;then echo Updating u-boot;if run update;"      \
240                 "then echo U-Boot updated;"                             \
241                         "else echo Error updating u-boot !;"            \
242                         "echo Board without bootloader !!;"             \
243                 "fi;"                                                   \
244                 "else echo U-Boot not downloaded..exiting;fi\0"         \
245         "bootcmd=run net_nfs\0"
246
247 #endif                          /* __CONFIG_H */