2 * (C) Copyright 2007 Michal Simek
4 * Michal SIMEK <monstr@monstr.eu>
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #include "../board/xilinx/ml401/xparameters.h"
30 #define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */
31 #define MICROBLAZE_V5 1
32 #define CONFIG_ML401 1 /* ML401 Board */
35 #define CONFIG_XILINX_UARTLITE
36 #define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR
37 #define CONFIG_BAUDRATE XILINX_UART_BAUDRATE
38 #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE }
40 /* setting reset address */
41 /*#define CFG_RESET_ADDRESS TEXT_BASE*/
44 #ifdef XILINX_EMAC_BASEADDR
45 #define CONFIG_XILINX_EMAC 1
47 #ifdef XILINX_EMACLITE_BASEADDR
48 #define CONFIG_XILINX_EMACLITE 1
55 #define CFG_GPIO_0_ADDR XILINX_GPIO_BASEADDR
57 /* interrupt controller */
59 #define CFG_INTC_0_ADDR XILINX_INTC_BASEADDR
60 #define CFG_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS
64 #define CFG_TIMER_0_ADDR XILINX_TIMER_BASEADDR
65 #define CFG_TIMER_0_IRQ XILINX_TIMER_IRQ
66 #define FREQUENCE XILINX_CLOCK_FREQ
67 #define CFG_TIMER_0_PRELOAD ( FREQUENCE/1000 )
68 #define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ
75 * memory layout - Example
76 * TEXT_BASE = 0x1200_0000;
77 * CFG_SRAM_BASE = 0x1000_0000;
78 * CFG_SRAM_SIZE = 0x0400_0000;
80 * CFG_GBL_DATA_OFFSET = 0x1000_0000 + 0x0400_0000 - 0x1000 = 0x13FF_F000
81 * CFG_MONITOR_BASE = 0x13FF_F000 - 0x40000 = 0x13FB_F000
82 * CFG_MALLOC_BASE = 0x13FB_F000 - 0x40000 = 0x13F7_F000
84 * 0x1000_0000 CFG_SDRAM_BASE
86 * 0x1200_0000 TEXT_BASE
92 * 0x13F7_F000 CFG_MALLOC_BASE
93 * MALLOC_AREA 256kB Alloc
94 * 0x11FB_F000 CFG_MONITOR_BASE
95 * MONITOR_CODE 256kB Env
96 * 0x13FF_F000 CFG_GBL_DATA_OFFSET
97 * GLOBAL_DATA 4kB bd, gd
98 * 0x1400_0000 CFG_SDRAM_BASE + CFG_SDRAM_SIZE
101 /* ddr sdram - main memory */
102 #define CFG_SDRAM_BASE XILINX_RAM_START
103 #define CFG_SDRAM_SIZE XILINX_RAM_SIZE
104 #define CFG_MEMTEST_START CFG_SDRAM_BASE
105 #define CFG_MEMTEST_END (CFG_SDRAM_BASE + 0x1000)
108 #define CFG_GBL_DATA_SIZE 0x1000 /* size of global data */
109 /* start of global data */
110 #define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE)
114 #define CFG_MONITOR_LEN SIZE
115 #define CFG_MONITOR_BASE (CFG_GBL_DATA_OFFSET - CFG_MONITOR_LEN)
116 #define CFG_MONITOR_END (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
117 #define CFG_MALLOC_LEN SIZE
118 #define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN)
121 #define CFG_INIT_SP_OFFSET CFG_MONITOR_BASE
127 #define CFG_FLASH_BASE XILINX_FLASH_START
128 #define CFG_FLASH_SIZE XILINX_FLASH_SIZE
129 #define CFG_FLASH_CFI 1
130 #define CFG_FLASH_CFI_DRIVER 1
131 #define CFG_FLASH_EMPTY_INFO 1 /* ?empty sector */
132 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
133 #define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
134 #define CFG_FLASH_PROTECTION /* hardware flash protection */
137 #define CFG_ENV_IS_NOWHERE 1
138 #define CFG_ENV_SIZE 0x1000
139 #define CFG_ENV_ADDR (CFG_MONITOR_BASE - CFG_ENV_SIZE)
142 #define CFG_ENV_IS_IN_FLASH 1
143 #define CFG_ENV_ADDR 0x40000
144 #define CFG_ENV_SECT_SIZE 0x40000 /* 256K(one sector) for env */
145 #define CFG_ENV_SIZE 0x2000
146 #endif /* !RAMBOOT */
149 #define CFG_NO_FLASH 1
150 #define CFG_ENV_IS_NOWHERE 1
151 #define CFG_ENV_SIZE 0x1000
152 #define CFG_ENV_ADDR (CFG_MONITOR_BASE - CFG_ENV_SIZE)
153 #define CFG_FLASH_PROTECTION /* hardware flash protection */
157 #ifdef XILINX_SYSACE_BASEADDR
158 #define CONFIG_SYSTEMACE
159 /* #define DEBUG_SYSTEMACE */
160 #define SYSTEMACE_CONFIG_FPGA
161 #define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR
162 #define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH
163 #define CONFIG_DOS_PARTITION
169 #define CONFIG_BOOTP_BOOTFILESIZE
170 #define CONFIG_BOOTP_BOOTPATH
171 #define CONFIG_BOOTP_GATEWAY
172 #define CONFIG_BOOTP_HOSTNAME
175 * Command line configuration.
177 #include <config_cmd_default.h>
179 #define CONFIG_CMD_ASKENV
180 #define CONFIG_CMD_CACHE
181 #define CONFIG_CMD_IRQ
182 #define CONFIG_CMD_MFSL
183 #define CONFIG_CMD_PING
185 #if defined(CONFIG_SYSTEMACE)
186 #define CONFIG_CMD_EXT2
187 #define CONFIG_CMD_FAT
191 #define CONFIG_CMD_ECHO
192 #define CONFIG_CMD_FLASH
193 #define CONFIG_CMD_IMLS
194 #define CONFIG_CMD_JFFS2
197 #define CONFIG_CMD_ENV
198 #define CONFIG_CMD_SAVES
201 #undef CONFIG_CMD_FLASH
204 #if defined(CONFIG_CMD_JFFS2)
205 /* JFFS2 partitions */
206 #define CONFIG_JFFS2_CMDLINE /* mtdparts command line support */
207 #define MTDIDS_DEFAULT "nor0=ml401-0"
209 /* default mtd partition table */
210 #define MTDPARTS_DEFAULT "mtdparts=ml401-0:256k(u-boot),"\
211 "256k(env),3m(kernel),1m(romfs),"\
212 "1m(cramfs),-(jffs2)"
215 /* Miscellaneous configurable options */
216 #define CFG_PROMPT "U-Boot-mONStR> "
217 #define CFG_CBSIZE 512 /* size of console buffer */
218 #define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) /* print buffer size */
219 #define CFG_MAXARGS 15 /* max number of command args */
221 #define CFG_LOAD_ADDR 0x12000000 /* default load address */
223 #define CONFIG_BOOTDELAY 30
224 #define CONFIG_BOOTARGS "root=romfs"
225 #define CONFIG_HOSTNAME "ml401"
226 #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
227 #define CONFIG_IPADDR 192.168.0.3
228 #define CONFIG_SERVERIP 192.168.0.5
229 #define CONFIG_GATEWAYIP 192.168.0.1
230 #define CONFIG_ETHADDR 00:E0:0C:00:00:FD
232 /* architecture dependent code */
233 #define CFG_USR_EXCEP /* user exception */
236 #define CONFIG_PREBOOT "echo U-BOOT for ML401;setenv preboot;echo"
238 #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\
240 "mtdparts=mtdparts=ml401-0:"\
241 "256k(u-boot),256k(env),3m(kernel),"\
242 "1m(romfs),1m(cramfs),-(jffs2)\0"
244 #endif /* __CONFIG_H */