Merge tag 'dm-pull-29oct19' of git://git.denx.de/u-boot-dm
[oweals/u-boot.git] / include / configs / m53menlo.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2
3 /*
4  * Menlosystems M53Menlo configuration
5  * Copyright (C) 2012-2017 Marek Vasut <marex@denx.de>
6  * Copyright (C) 2014-2017 Olaf Mandel <o.mandel@menlosystems.com>
7  */
8
9 #ifndef __M53MENLO_CONFIG_H__
10 #define __M53MENLO_CONFIG_H__
11
12 #include <asm/arch/imx-regs.h>
13
14 #define CONFIG_REVISION_TAG
15 #define CONFIG_SYS_FSL_CLK
16
17 #define CONFIG_TIMESTAMP                /* Print image info with timestamp */
18
19 /*
20  * Memory configurations
21  */
22 #define PHYS_SDRAM_1                    CSD0_BASE_ADDR
23 #define PHYS_SDRAM_1_SIZE               (gd->bd->bi_dram[0].size)
24 #define PHYS_SDRAM_2                    CSD1_BASE_ADDR
25 #define PHYS_SDRAM_2_SIZE               (gd->bd->bi_dram[1].size)
26 #define PHYS_SDRAM_SIZE                 (gd->ram_size)
27 #define CONFIG_SYS_MALLOC_LEN           (10 * 1024 * 1024)
28 #define CONFIG_SYS_MEMTEST_START        0x70000000
29 #define CONFIG_SYS_MEMTEST_END          0x8ff00000
30
31 #define CONFIG_SYS_SDRAM_BASE           (PHYS_SDRAM_1)
32 #define CONFIG_SYS_INIT_RAM_ADDR        (IRAM_BASE_ADDR)
33 #define CONFIG_SYS_INIT_RAM_SIZE        (IRAM_SIZE)
34
35 #define CONFIG_SYS_INIT_SP_OFFSET \
36         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
37 #define CONFIG_SYS_INIT_SP_ADDR \
38         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
39
40 /*
41  * U-Boot general configurations
42  */
43 #define CONFIG_SYS_CBSIZE       1024            /* Console I/O buffer size */
44 #define CONFIG_SYS_MAXARGS      32              /* Max number of command args */
45 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE
46                                                 /* Boot argument buffer size */
47
48 /*
49  * Serial Driver
50  */
51 #define CONFIG_MXC_UART
52 #define CONFIG_MXC_UART_BASE            UART1_BASE
53
54 /*
55  * MMC Driver
56  */
57 #ifdef CONFIG_CMD_MMC
58 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
59 #define CONFIG_SYS_FSL_ESDHC_NUM        1
60 #endif
61
62 /*
63  * NAND
64  */
65 #define CONFIG_ENV_SIZE                 (16 * 1024)
66 #ifdef CONFIG_CMD_NAND
67 #define CONFIG_SYS_MAX_NAND_DEVICE      1
68 #define CONFIG_SYS_NAND_BASE            NFC_BASE_ADDR_AXI
69 #define CONFIG_MXC_NAND_REGS_BASE       NFC_BASE_ADDR_AXI
70 #define CONFIG_MXC_NAND_IP_REGS_BASE    NFC_BASE_ADDR
71 #define CONFIG_SYS_NAND_LARGEPAGE
72 #define CONFIG_MXC_NAND_HWECC
73
74 /* Environment is in NAND */
75 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
76 #define CONFIG_ENV_SECT_SIZE            (128 * 1024)
77 #define CONFIG_ENV_RANGE                (4 * CONFIG_ENV_SECT_SIZE)
78 #define CONFIG_ENV_OFFSET               (8 * CONFIG_ENV_SECT_SIZE) /* 1 MiB */
79 #define CONFIG_ENV_OFFSET_REDUND        \
80                 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
81 #endif
82
83 /*
84  * Ethernet on SOC (FEC)
85  */
86 #ifdef CONFIG_CMD_NET
87 #define CONFIG_FEC_MXC
88 #define IMX_FEC_BASE                    FEC_BASE_ADDR
89 #define CONFIG_FEC_MXC_PHYADDR          0x0
90 #define CONFIG_MII
91 #define CONFIG_DISCOVER_PHY
92 #define CONFIG_FEC_XCV_TYPE             RMII
93 #define CONFIG_ETHPRIME                 "FEC0"
94 #endif
95
96 /*
97  * I2C
98  */
99 #ifdef CONFIG_CMD_I2C
100 #define CONFIG_SYS_I2C
101 #define CONFIG_SYS_I2C_MXC
102 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
103 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
104 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
105 #define CONFIG_SYS_RTC_BUS_NUM          1 /* I2C2 */
106 #endif
107
108 /*
109  * RTC
110  */
111 #ifdef CONFIG_CMD_DATE
112 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
113 #define CONFIG_SYS_M41T11_BASE_YEAR     2000
114 #endif
115
116 /*
117  * USB
118  */
119 #ifdef CONFIG_CMD_USB
120 #define CONFIG_MXC_USB_PORT             1
121 #define CONFIG_MXC_USB_PORTSC           (PORT_PTS_UTMI | PORT_PTS_PTW)
122 #define CONFIG_MXC_USB_FLAGS            0
123 #endif
124
125 /*
126  * SATA
127  */
128 #ifdef CONFIG_CMD_SATA
129 #define CONFIG_SYS_SATA_MAX_DEVICE      1
130 #define CONFIG_DWC_AHSATA_PORT_ID       0
131 #define CONFIG_DWC_AHSATA_BASE_ADDR     SATA_BASE_ADDR
132 #define CONFIG_LBA48
133 #endif
134
135 /*
136  * LCD
137  */
138 #define CONFIG_VIDEO_BMP_RLE8
139 #define CONFIG_VIDEO_BMP_GZIP
140 #define CONFIG_SPLASH_SCREEN
141 #define CONFIG_SPLASHIMAGE_GUARD
142 #define CONFIG_SPLASH_SCREEN_ALIGN
143 #define CONFIG_BMP_16BPP
144 #define CONFIG_VIDEO_LOGO
145 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE  (2 << 20)
146
147 /* LVDS display */
148 #define CONFIG_SYS_LDB_CLOCK                    33260000
149 #define CONFIG_IMX_VIDEO_SKIP
150 #define CONFIG_SPLASH_SOURCE
151
152 /* IIM Fuses */
153 #define CONFIG_FSL_IIM
154
155 /* Watchdog */
156
157 /*
158  * Boot Linux
159  */
160 #define CONFIG_CMDLINE_TAG
161 #define CONFIG_INITRD_TAG
162 #define CONFIG_REVISION_TAG
163 #define CONFIG_SETUP_MEMORY_TAGS
164 #define CONFIG_BOOTFILE         "boot/fitImage"
165 #define CONFIG_LOADADDR         0x70800000
166 #define CONFIG_BOOTCOMMAND      "run mmc_mmc"
167 #define CONFIG_SYS_LOAD_ADDR    CONFIG_LOADADDR
168
169 /*
170  * NAND SPL
171  */
172 #define CONFIG_SPL_TARGET               "u-boot-with-nand-spl.imx"
173 #define CONFIG_SPL_PAD_TO               0x8000
174 #define CONFIG_SPL_STACK                0x70004000
175
176 #define CONFIG_SYS_NAND_U_BOOT_OFFS     CONFIG_SPL_PAD_TO
177 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
178 #define CONFIG_SYS_NAND_OOBSIZE         64
179 #define CONFIG_SYS_NAND_PAGE_COUNT      64
180 #define CONFIG_SYS_NAND_SIZE            (256 * 1024 * 1024)
181 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
182
183 /*
184  * Extra Environments
185  */
186 #define CONFIG_HOSTNAME         "m53menlo"
187
188 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
189         "consdev=ttymxc0\0"                                             \
190         "baudrate=115200\0"                                             \
191         "bootscript=boot.scr\0"                                         \
192         "mmcdev=0\0"                                                    \
193         "mmcpart=1\0"                                                   \
194         "rootpath=/srv/\0"                                              \
195         "kernel_addr_r=0x72000000\0"                                    \
196         "mtdids=" CONFIG_MTDIDS_DEFAULT "\0"                            \
197         "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"                        \
198         "netdev=eth0\0"                                                 \
199         "splashsource=mmc_fs\0"                                         \
200         "splashfile=boot/usplash.bmp.gz\0"                              \
201         "splashimage=0x88000000\0"                                      \
202         "splashpos=m,m\0"                                               \
203         "stdout=serial,vidconsole\0"                                    \
204         "stderr=serial,vidconsole\0"                                    \
205         "addcons="                                                      \
206                 "setenv bootargs ${bootargs} "                          \
207                 "console=${consdev},${baudrate}\0"                      \
208         "addip="                                                        \
209                 "setenv bootargs ${bootargs} "                          \
210                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
211                 ":${hostname}:${netdev}:off\0"                          \
212         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
213         "addmisc="                                                      \
214                 "setenv bootargs ${bootargs} ${miscargs}\0"             \
215         "addargs=run addcons addmisc addmtd\0"                          \
216         "mmcload="                                                      \
217                 "mmc rescan ; load mmc ${mmcdev}:${mmcpart} "           \
218                 "${kernel_addr_r} ${bootfile}\0"                        \
219         "miscargs=nohlt panic=1\0"                                      \
220         "mmcargs=setenv bootargs root=/dev/mmcblk0p${mmcpart} rw "      \
221                 "rootwait\0"                                            \
222         "mmc_mmc="                                                      \
223                 "run mmcload mmcargs addargs ; "                        \
224                 "bootm ${kernel_addr_r}\0"                              \
225         "netload=tftp ${kernel_addr_r} ${hostname}/${bootfile}\0"       \
226         "net_nfs="                                                      \
227                 "run netload nfsargs addip addargs ; "                  \
228                 "bootm ${kernel_addr_r}\0"                              \
229         "nfsargs="                                                      \
230                 "setenv bootargs root=/dev/nfs rw "                     \
231                 "nfsroot=${serverip}:${rootpath}${hostname},v3,tcp\0"   \
232         "try_bootscript="                                               \
233                 "mmc rescan;"                                           \
234                 "if test -e mmc 0:1 ${bootscript} ; then "              \
235                 "if load mmc 0:1 ${kernel_addr_r} ${bootscript};"       \
236                 "then ; "                                               \
237                         "echo Running bootscript... ; "                 \
238                         "source ${kernel_addr_r} ; "                    \
239                 "fi ; "                                                 \
240                 "fi\0"
241
242 #if defined(CONFIG_SPL_BUILD)
243 #undef CONFIG_WATCHDOG
244 #define CONFIG_HW_WATCHDOG
245 #endif
246
247 #endif  /* __M53MENLO_CONFIG_H__ */