2 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
3 * on behalf of DENX Software Engineering GmbH
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 #include <asm/arch/regs-base.h>
28 #define CONFIG_MX28 /* i.MX28 SoC */
29 #define CONFIG_MXS_GPIO /* GPIO control */
30 #define CONFIG_SYS_HZ 1000 /* Ticks per second */
33 * Define M28EVK machine type by hand until it lands in mach-types
35 #define MACH_TYPE_M28EVK 3613
37 #define CONFIG_MACH_TYPE MACH_TYPE_M28EVK
39 #define CONFIG_SYS_NO_FLASH
40 #define CONFIG_SYS_ICACHE_OFF
41 #define CONFIG_SYS_DCACHE_OFF
42 #define CONFIG_BOARD_EARLY_INIT_F
43 #define CONFIG_ARCH_CPU_INIT
48 #include <config_cmd_default.h>
49 #define CONFIG_DISPLAY_CPUINFO
50 #define CONFIG_DOS_PARTITION
52 #define CONFIG_CMD_CACHE
53 #define CONFIG_CMD_DATE
54 #define CONFIG_CMD_DHCP
55 #define CONFIG_CMD_EEPROM
56 #define CONFIG_CMD_EXT2
57 #define CONFIG_CMD_FAT
58 #define CONFIG_CMD_GPIO
59 #define CONFIG_CMD_I2C
60 #define CONFIG_CMD_MII
61 #define CONFIG_CMD_MMC
62 #define CONFIG_CMD_NAND
63 #define CONFIG_CMD_NET
64 #define CONFIG_CMD_NFS
65 #define CONFIG_CMD_PING
66 #define CONFIG_CMD_SETEXPR
68 #define CONFIG_CMD_SPI
71 * Memory configurations
73 #define CONFIG_NR_DRAM_BANKS 1 /* 2 banks of DRAM */
74 #define PHYS_SDRAM_1 0x40000000 /* Base address */
75 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
76 #define CONFIG_STACKSIZE 0x00010000 /* 128 KB stack */
77 #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
78 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */
79 #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
80 #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
81 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
82 /* Point initial SP in SRAM so SPL can use it too. */
83 #define CONFIG_SYS_INIT_SP_ADDR 0x00002000
85 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
86 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
87 * binary. In case there was more of this mess, 0x100 bytes are skipped.
89 #define CONFIG_SYS_TEXT_BASE 0x40000100
92 * U-Boot general configurations
94 #define CONFIG_SYS_LONGHELP
95 #define CONFIG_SYS_PROMPT "=> "
96 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
97 #define CONFIG_SYS_PBSIZE \
98 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
99 /* Print buffer size */
100 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
101 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
102 /* Boot argument buffer size */
103 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
104 #define CONFIG_AUTO_COMPLETE /* Command auto complete */
105 #define CONFIG_CMDLINE_EDITING /* Command history etc */
106 #define CONFIG_SYS_HUSH_PARSER
107 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
112 #define CONFIG_PL011_SERIAL
113 #define CONFIG_PL011_CLOCK 24000000
114 #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
115 #define CONFIG_CONS_INDEX 0
116 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
117 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
122 #ifdef CONFIG_CMD_MMC
124 #define CONFIG_GENERIC_MMC
125 #define CONFIG_MXS_MMC
131 #ifdef CONFIG_CMD_NAND
132 #define CONFIG_NAND_MXS
133 #define CONFIG_APBH_DMA
134 #define CONFIG_SYS_MAX_NAND_DEVICE 1
135 #define CONFIG_SYS_NAND_BASE 0x60000000
136 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
137 #define NAND_MAX_CHIPS 8
139 /* Environment is in NAND */
140 #define CONFIG_ENV_IS_IN_NAND
141 #define CONFIG_ENV_SIZE (16 * 1024)
142 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
143 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
144 #define CONFIG_ENV_RANGE (512 * 1024)
145 #define CONFIG_ENV_OFFSET 0x300000
146 #define CONFIG_ENV_OFFSET_REDUND \
147 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
149 #define CONFIG_CMD_UBI
150 #define CONFIG_CMD_UBIFS
151 #define CONFIG_CMD_MTDPARTS
152 #define CONFIG_RBTREE
154 #define CONFIG_MTD_DEVICE
155 #define CONFIG_MTD_PARTITIONS
156 #define MTDIDS_DEFAULT "nand0=gpmi-nand.0"
157 #define MTDPARTS_DEFAULT \
158 "mtdparts=gpmi-nand.0:" \
159 "3m(bootloader)ro," \
160 "512k(environment)," \
161 "512k(redundant-environment)," \
167 * Ethernet on SOC (FEC)
169 #ifdef CONFIG_CMD_NET
170 #define CONFIG_NET_MULTI
171 #define CONFIG_ETHPRIME "FEC0"
172 #define CONFIG_FEC_MXC
173 #define CONFIG_FEC_MXC_MULTI
175 #define CONFIG_DISCOVER_PHY
176 #define CONFIG_FEC_XCV_TYPE RMII
182 #ifdef CONFIG_CMD_I2C
183 #define CONFIG_I2C_MXS
184 #define CONFIG_HARD_I2C
185 #define CONFIG_SYS_I2C_SPEED 400000
191 #ifdef CONFIG_CMD_EEPROM
192 #define CONFIG_SYS_I2C_MULTI_EEPROMS
193 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
199 #ifdef CONFIG_CMD_DATE
200 /* Use the internal RTC in the MXS chip */
201 #define CONFIG_RTC_INTERNAL
202 #ifdef CONFIG_RTC_INTERNAL
203 #define CONFIG_RTC_MXS
205 #define CONFIG_RTC_M41T62
206 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
207 #define CONFIG_SYS_M41T11_BASE_YEAR 2000
214 #ifdef CONFIG_CMD_SPI
215 #define CONFIG_HARD_SPI
216 #define CONFIG_MXS_SPI
217 #define CONFIG_SPI_HALF_DUPLEX
218 #define CONFIG_DEFAULT_SPI_BUS 2
219 #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0
223 #define CONFIG_SPI_FLASH
224 #define CONFIG_SPI_FLASH_STMICRO
225 #define CONFIG_SPI_FLASH_CS 2
226 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
227 #define CONFIG_SF_DEFAULT_SPEED 24000000
229 #define CONFIG_ENV_SPI_CS 0
230 #define CONFIG_ENV_SPI_BUS 2
231 #define CONFIG_ENV_SPI_MAX_HZ 24000000
232 #define CONFIG_ENV_SPI_MODE SPI_MODE_0
239 #define CONFIG_CMDLINE_TAG
240 #define CONFIG_SETUP_MEMORY_TAGS
241 #define CONFIG_BOOTDELAY 3
242 #define CONFIG_BOOTFILE "uImage"
243 #define CONFIG_BOOTARGS "console=ttyAM0,115200n8 "
244 #define CONFIG_BOOTCOMMAND "run bootcmd_net"
245 #define CONFIG_LOADADDR 0x42000000
246 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
251 #define CONFIG_EXTRA_ENV_SETTINGS \
252 "update_nand_full_filename=u-boot.nand\0" \
253 "update_nand_firmware_filename=u-boot.sb\0" \
254 "update_nand_firmware_maxsz=0x100000\0" \
255 "update_nand_stride=0x40\0" /* MX28 datasheet ch. 12.12 */ \
256 "update_nand_count=0x4\0" /* MX28 datasheet ch. 12.12 */ \
257 "update_nand_get_fcb_size=" /* Get size of FCB blocks */ \
260 "setexpr fcb_sz ${update_nand_stride} * ${update_nand_count};" \
261 "setexpr update_nand_fcb ${fcb_sz} * ${nand_writesize}\0" \
262 "update_nand_full=" /* Update FCB, DBBT and FW */ \
263 "if tftp ${update_nand_full_filename} ; then " \
264 "run update_nand_get_fcb_size ; " \
265 "nand scrub -y 0x0 ${filesize} ; " \
266 "nand write.raw ${loadaddr} 0x0 ${update_nand_fcb} ; " \
267 "setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \
268 "setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \
269 "nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \
271 "update_nand_firmware=" /* Update only firmware */ \
272 "if tftp ${update_nand_firmware_filename} ; then " \
273 "run update_nand_get_fcb_size ; " \
274 "setexpr fcb_sz ${update_nand_fcb} * 2 ; " /* FCB + DBBT */ \
275 "setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; " \
276 "setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz};" \
277 "nand erase ${fcb_sz} ${fw_sz} ; " \
278 "nand write ${loadaddr} ${fcb_sz} ${filesize} ; " \
279 "nand write ${loadaddr} ${fw_off} ${filesize} ; " \
282 #endif /* __M28_H__ */