2 * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
3 * Copyright (C) 2012 Renesas Solutions Corp.
5 * SPDX-License-Identifier: GPL-2.0+
14 #define CONFIG_MACH_TYPE MACH_TYPE_KZM9G
16 #include <asm/arch/rmobile.h>
18 #define CONFIG_ARCH_CPU_INIT
20 #define CONFIG_CMDLINE_TAG
21 #define CONFIG_SETUP_MEMORY_TAGS
22 #define CONFIG_INITRD_TAG
24 #undef CONFIG_SHOW_BOOT_PROGRESS
27 #define KZM_SDRAM_BASE (0x40000000)
28 #define PHYS_SDRAM KZM_SDRAM_BASE
29 #define PHYS_SDRAM_SIZE (512 * 1024 * 1024)
30 #define CONFIG_NR_DRAM_BANKS (1)
33 #define KZM_FLASH_BASE (0x00000000)
34 #define CONFIG_SYS_FLASH_BASE (KZM_FLASH_BASE)
35 #define CONFIG_SYS_FLASH_CFI_WIDTH (FLASH_CFI_16BIT)
36 #define CONFIG_SYS_MAX_FLASH_BANKS (1)
37 #define CONFIG_SYS_MAX_FLASH_SECT (512)
40 #define CONFIG_SYS_PBSIZE 256
41 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
44 #define CONFIG_CONS_SCIF4
46 #define CONFIG_SYS_MEMTEST_START (KZM_SDRAM_BASE)
47 #define CONFIG_SYS_MEMTEST_END \
48 (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
49 #undef CONFIG_SYS_MEMTEST_SCRATCH
50 #undef CONFIG_SYS_LOADS_BAUD_CHANGE
52 #define CONFIG_SYS_INIT_RAM_ADDR (0xE5600000) /* on MERAM */
53 #define CONFIG_SYS_INIT_RAM_SIZE (0x10000)
54 #define LOW_LEVEL_MERAM_STACK (CONFIG_SYS_INIT_RAM_ADDR - 4)
55 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
56 CONFIG_SYS_INIT_RAM_SIZE - \
57 GENERATED_GBL_DATA_SIZE)
58 #define CONFIG_SDRAM_OFFSET_FOR_RT (16 * 1024 * 1024)
59 #define CONFIG_SYS_SDRAM_BASE (KZM_SDRAM_BASE + CONFIG_SDRAM_OFFSET_FOR_RT)
60 #define CONFIG_SYS_SDRAM_SIZE (PHYS_SDRAM_SIZE - CONFIG_SDRAM_OFFSET_FOR_RT)
61 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024)
63 #define CONFIG_SYS_MONITOR_BASE (KZM_FLASH_BASE)
64 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
65 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
67 #define CONFIG_STANDALONE_LOAD_ADDR 0x41000000
70 #define CONFIG_FLASH_CFI_DRIVER
71 #define CONFIG_SYS_FLASH_CFI
72 #undef CONFIG_SYS_FLASH_QUIET_TEST
73 #define CONFIG_SYS_FLASH_EMPTY_INFO
74 #define FLASH_SECTOR_SIZE (256 * 1024) /* 256 KB sectors */
75 #define CONFIG_ENV_SIZE FLASH_SECTOR_SIZE
76 #define CONFIG_ENV_OFFSET FLASH_SECTOR_SIZE
77 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
79 /* Timeout for Flash erase operations (in ms) */
80 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
81 /* Timeout for Flash write operations (in ms) */
82 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
83 /* Timeout for Flash set sector lock bit operations (in ms) */
84 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
85 /* Timeout for Flash clear lock bit operations (in ms) */
86 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
88 #undef CONFIG_SYS_FLASH_PROTECTION
89 #undef CONFIG_SYS_DIRECT_FLASH_TFTP
92 #define CONFIG_SH_GPIO_PFC
95 #define CONFIG_GLOBAL_TIMER
96 #define CONFIG_SYS_CLK_FREQ (48000000)
97 #define CONFIG_SYS_CPU_CLK (1196000000)
98 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
99 #define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */
101 #define CONFIG_NFS_TIMEOUT 10000UL
104 #define CONFIG_SYS_I2C
105 #define CONFIG_SYS_I2C_SH
106 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 5
107 #define CONFIG_SYS_I2C_SH_BASE0 0xE6820000
108 #define CONFIG_SYS_I2C_SH_SPEED0 100000
109 #define CONFIG_SYS_I2C_SH_BASE1 0xE6822000
110 #define CONFIG_SYS_I2C_SH_SPEED1 100000
111 #define CONFIG_SYS_I2C_SH_BASE2 0xE6824000
112 #define CONFIG_SYS_I2C_SH_SPEED2 100000
113 #define CONFIG_SYS_I2C_SH_BASE3 0xE6826000
114 #define CONFIG_SYS_I2C_SH_SPEED3 100000
115 #define CONFIG_SYS_I2C_SH_BASE4 0xE6828000
116 #define CONFIG_SYS_I2C_SH_SPEED4 100000
117 #define CONFIG_SH_I2C_8BIT
118 #define CONFIG_SH_I2C_DATA_HIGH 4
119 #define CONFIG_SH_I2C_DATA_LOW 5
120 #define CONFIG_SH_I2C_CLOCK 104000000 /* 104 MHz */
122 #endif /* __KZM9G_H */