3 * Marvell Semiconductor <www.marvell.com>
4 * Prafulla Wadaskar <prafulla@marvell.com>
7 * Stefan Roese, DENX Software Engineering, sr@denx.de.
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
28 /* for linking errors see http://lists.denx.de/pipermail/u-boot/2009-July/057350.html */
30 #ifndef _CONFIG_KM_ARM_H
31 #define _CONFIG_KM_ARM_H
34 * High Level Configuration Options (easy to change)
36 #define CONFIG_MARVELL
37 #define CONFIG_ARM926EJS /* Basic Architecture */
38 #define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */
39 #define CONFIG_KIRKWOOD /* SOC Family Name */
40 #define CONFIG_KW88F6281 /* SOC Name */
41 #define CONFIG_MACH_SUEN3 /* Machine type */
43 /* include common defines/options for all Keymile boards */
44 #include "keymile-common.h"
46 #undef CONFIG_BOOTCOUNT_LIMIT
48 #define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */
49 #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
50 #define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */
51 #undef CONFIG_KIRKWOOD_PCIE_INIT /* Disable PCIE Port0 for kernel */
52 #define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */
54 #define CONFIG_MISC_INIT_R
57 * NS16550 Configuration
59 #define CONFIG_SYS_NS16550
60 #define CONFIG_SYS_NS16550_SERIAL
61 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
62 #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
63 #define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE
66 * Serial Port configuration
67 * The following definitions let you select what serial you want to use
68 * for your console driver.
71 #define CONFIG_CONS_INDEX 1 /* Console on UART0 */
74 * For booting Linux, the board info and command line data
75 * have to be in the first 8 MB of memory, since this is
76 * the maximum mapped by the Linux kernel during initialization.
78 #define CONFIG_BOOTMAPSZ (8 << 20) /* Initial Memmap for Linux */
79 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
80 #define CONFIG_INITRD_TAG /* enable INITRD tag */
81 #define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
84 * Commands configuration
86 #define CONFIG_CMD_ELF
87 #define CONFIG_CMD_MTDPARTS
88 #define CONFIG_CMD_NAND
89 #define CONFIG_CMD_NFS
92 * Without NOR FLASH we need this
94 #define CONFIG_SYS_NO_FLASH
95 #undef CONFIG_CMD_FLASH
96 #undef CONFIG_CMD_IMLS
99 * NAND Flash configuration
101 #define CONFIG_SYS_MAX_NAND_DEVICE 1
102 #define NAND_MAX_CHIPS 1
103 #define CONFIG_NAND_KIRKWOOD
104 #define CONFIG_SYS_NAND_BASE 0xd8000000
106 #define BOOTFLASH_START 0x0
108 #define CONFIG_KM_CONSOLE_TTY "ttyS0"
110 /* size in bytes reserved for initial data */
113 * Other required minimal configurations
115 #define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */
116 #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
117 #define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */
118 #define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
119 #define CONFIG_NR_DRAM_BANKS 4
120 #define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */
121 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
124 * Ethernet Driver configuration
126 #define CONFIG_NETCONSOLE /* include NetConsole support */
127 #define CONFIG_NET_MULTI /* specify more that one ports available */
128 #define CONFIG_MII /* expose smi ove miiphy interface */
129 #define CONFIG_MVGBE /* Enable Marvell Gbe Controller Driver */
130 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */
131 #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
132 #define CONFIG_PHY_BASE_ADR 0
133 #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
134 #define CONFIG_RESET_PHY_R /* use reset_phy() to init 88E1118 PHY */
139 #define CONFIG_SYS_USE_UBI
144 #define CONFIG_SOFT_I2C /* I2C bit-banged */
146 #define CONFIG_KIRKWOOD_GPIO /* Enable GPIO Support */
147 #if defined(CONFIG_SOFT_I2C)
149 #include <asm/arch-kirkwood/gpio.h>
150 extern void __set_direction(unsigned pin, int high);
151 void set_sda (int state);
152 void set_scl (int state);
155 #define SUEN3_SDA_PIN 8
156 #define SUEN3_SCL_PIN 9
157 #define SUEN3_ENV_WP 38
159 #define I2C_ACTIVE __set_direction(SUEN3_SDA_PIN, 0)
160 #define I2C_TRISTATE __set_direction(SUEN3_SDA_PIN, 1)
161 #define I2C_READ (kw_gpio_get_value(SUEN3_SDA_PIN) ? 1 : 0)
162 #define I2C_SDA(bit) kw_gpio_set_value(SUEN3_SDA_PIN, bit);
163 #define I2C_SCL(bit) kw_gpio_set_value(SUEN3_SCL_PIN, bit);
166 #define I2C_DELAY udelay(3) /* 1/4 I2C clock duration */
167 #define I2C_SOFT_DECLARATIONS
169 #define CONFIG_SYS_I2C_SLAVE 0x0
170 #define CONFIG_SYS_I2C_SPEED 100000
173 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
174 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
176 #if defined(CONFIG_SYS_NO_FLASH)
177 #define CONFIG_KM_UBI_PARTITION_NAME "ubi0"
178 #undef CONFIG_FLASH_CFI_MTD
179 #undef CONFIG_JFFS2_CMDLINE
182 /* additions for new relocation code, must be added to all boards */
183 #define CONFIG_SYS_SDRAM_BASE 0x00000000
184 /* Kirkwood has 2k of Security SRAM, use it for SP */
185 #define CONFIG_SYS_INIT_SP_ADDR 0xC8012000
186 /* Do early setups now in board_init_f() */
187 #define CONFIG_BOARD_EARLY_INIT_F
188 #endif /* _CONFIG_KM_ARM_H */