3 * Marvell Semiconductor <www.marvell.com>
4 * Prafulla Wadaskar <prafulla@marvell.com>
7 * Stefan Roese, DENX Software Engineering, sr@denx.de.
9 * (C) Copyright 2010-2011
10 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
12 * See file CREDITS for list of people who contributed to this
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
32 * for linking errors see
33 * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
36 #ifndef _CONFIG_KM_ARM_H
37 #define _CONFIG_KM_ARM_H
40 * High Level Configuration Options (easy to change)
42 #define CONFIG_MARVELL
43 #define CONFIG_ARM926EJS /* Basic Architecture */
44 #define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */
45 #define CONFIG_KIRKWOOD /* SOC Family Name */
46 #define CONFIG_KW88F6281 /* SOC Name */
47 #define CONFIG_MACH_KM_KIRKWOOD /* Machine type */
49 /* include common defines/options for all Keymile boards */
50 #include "keymile-common.h"
52 #define CONFIG_SYS_TEXT_BASE 0x04000000 /* code address after reloc */
53 #define CONFIG_ENV_SIZE (128 << 10) /* NAND chip block size */
54 #define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */
55 #define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */
56 #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
58 /* pseudo-non volatile RAM [hex] */
59 #define CONFIG_KM_PNVRAM 0x80000
60 /* physical RAM MTD size [hex] */
61 #define CONFIG_KM_PHRAM 0x17F000
63 #define CONFIG_KM_CRAMFS_ADDR 0x2400000
64 #define CONFIG_KM_KERNEL_ADDR 0x2000000 /* 4096KBytes */
66 #define CONFIG_KM_DEF_ENV_CPU \
68 "setenv bootargs ${bootargs} " \
69 "bootcountaddr=${bootcountaddr}\0" \
70 "addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0" \
71 "boot=bootm ${actual_kernel_addr} - -\0" \
72 "cramfsloadfdt=true\0" \
73 CONFIG_KM_DEF_ENV_UPDATE \
76 #define CONFIG_KM_ARCH_DBG_FILE "scripts/debug-arm-env.txt"
78 #define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */
79 #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
80 #define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */
81 #undef CONFIG_KIRKWOOD_PCIE_INIT /* Disable PCIE Port0 for kernel */
82 #define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */
84 #define CONFIG_MISC_INIT_R
87 * NS16550 Configuration
89 #define CONFIG_SYS_NS16550
90 #define CONFIG_SYS_NS16550_SERIAL
91 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
92 #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
93 #define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE
96 * Serial Port configuration
97 * The following definitions let you select what serial you want to use
98 * for your console driver.
101 #define CONFIG_CONS_INDEX 1 /* Console on UART0 */
104 * For booting Linux, the board info and command line data
105 * have to be in the first 8 MB of memory, since this is
106 * the maximum mapped by the Linux kernel during initialization.
108 #define CONFIG_BOOTMAPSZ (8 << 20) /* Initial Memmap for Linux */
109 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
110 #define CONFIG_INITRD_TAG /* enable INITRD tag */
111 #define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
114 * Commands configuration
116 #define CONFIG_CMD_ELF
117 #define CONFIG_CMD_MTDPARTS
118 #define CONFIG_CMD_NAND
119 #define CONFIG_CMD_NFS
122 * Without NOR FLASH we need this
124 #define CONFIG_SYS_NO_FLASH
125 #undef CONFIG_CMD_FLASH
126 #undef CONFIG_CMD_IMLS
129 * NAND Flash configuration
131 #define CONFIG_SYS_MAX_NAND_DEVICE 1
132 #define NAND_MAX_CHIPS 1
133 #define CONFIG_NAND_KIRKWOOD
134 #define CONFIG_SYS_NAND_BASE 0xd8000000
136 #define BOOTFLASH_START 0x0
138 #define CONFIG_KM_CONSOLE_TTY "ttyS0"
141 * Other required minimal configurations
143 #define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */
144 #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
145 #define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */
146 #define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
147 #define CONFIG_NR_DRAM_BANKS 4
148 #define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */
149 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
152 * Ethernet Driver configuration
154 #define CONFIG_NETCONSOLE /* include NetConsole support */
155 #define CONFIG_NET_MULTI /* specify more that one ports available */
156 #define CONFIG_MII /* expose smi ove miiphy interface */
157 #define CONFIG_MVGBE /* Enable Marvell Gbe Controller Driver */
158 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */
159 #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
160 #define CONFIG_PHY_BASE_ADR 0
161 #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
162 #define CONFIG_RESET_PHY_R /* use reset_phy() to init 88E1118 PHY */
167 #define CONFIG_SYS_USE_UBI
172 #define CONFIG_SOFT_I2C /* I2C bit-banged */
174 #define CONFIG_KIRKWOOD_GPIO /* Enable GPIO Support */
175 #if defined(CONFIG_SOFT_I2C)
177 #include <asm/arch-kirkwood/gpio.h>
178 extern void __set_direction(unsigned pin, int high);
179 void set_sda(int state);
180 void set_scl(int state);
183 #define KM_KIRKWOOD_SDA_PIN 8
184 #define KM_KIRKWOOD_SCL_PIN 9
185 #define KM_KIRKWOOD_ENV_WP 38
187 #define I2C_ACTIVE __set_direction(KM_KIRKWOOD_SDA_PIN, 0)
188 #define I2C_TRISTATE __set_direction(KM_KIRKWOOD_SDA_PIN, 1)
189 #define I2C_READ (kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0)
190 #define I2C_SDA(bit) kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit)
191 #define I2C_SCL(bit) kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit)
194 #define I2C_DELAY udelay(3) /* 1/4 I2C clock duration */
195 #define I2C_SOFT_DECLARATIONS
197 #define CONFIG_SYS_I2C_SLAVE 0x0
198 #define CONFIG_SYS_I2C_SPEED 100000
201 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
202 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
205 * Environment variables configurations
207 #define CONFIG_ENV_IS_IN_EEPROM /* use EEPROM for environment vars */
208 #define CONFIG_SYS_DEF_EEPROM_ADDR 0x50
209 #define CONFIG_ENV_EEPROM_IS_ON_I2C
210 #define CONFIG_SYS_EEPROM_WREN
211 #define CONFIG_ENV_OFFSET 0x0 /* no bracets! */
212 #undef CONFIG_ENV_SIZE
213 #define CONFIG_ENV_SIZE (0x2000 - CONFIG_ENV_OFFSET)
214 #define CONFIG_I2C_ENV_EEPROM_BUS "pca9547:70:d\0"
216 /* offset redund: (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
217 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
218 #define CONFIG_ENV_OFFSET_REDUND 0x2000 /* no bracets! */
219 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
221 #define CONFIG_CMD_SF
223 #define CONFIG_SPI_FLASH
224 #define CONFIG_HARD_SPI
225 #define CONFIG_KIRKWOOD_SPI
226 #define CONFIG_SPI_FLASH_STMICRO
227 #define CONFIG_ENV_SPI_BUS 0
228 #define CONFIG_ENV_SPI_CS 0
229 #define CONFIG_ENV_SPI_MAX_HZ 50000000 /* 50Mhz */
231 #define FLASH_GPIO_PIN 0x00010000
233 #define MTDIDS_DEFAULT "nand0=orion_nand"
234 /* test-only: partitioning needs some tuning, this is just for tests */
235 #define MTDPARTS_DEFAULT "mtdparts=" \
237 "-(" CONFIG_KM_UBI_PARTITION_NAME ")"
239 #define CONFIG_KM_DEF_ENV_UPDATE \
241 "spi on;sf probe 0;sf erase 0 50000;" \
242 "sf write ${u-boot_addr_r} 0 ${filesize};" \
246 * Default environment variables
248 #define CONFIG_EXTRA_ENV_SETTINGS \
250 "newenv=setenv addr 0x100000 && " \
251 "i2c dev 1; mw.b ${addr} 0 4 && " \
252 "eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR) \
253 " ${addr} " xstr(CONFIG_ENV_OFFSET) " 4 && " \
254 "eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR) \
255 " ${addr} " xstr(CONFIG_ENV_OFFSET_REDUND) " 4\0" \
256 "rootpath=/opt/eldk/arm\0" \
257 "EEprom_ivm=" KM_IVM_BUS "\0" \
260 #if defined(CONFIG_SYS_NO_FLASH)
261 #define CONFIG_KM_UBI_PARTITION_NAME "ubi0"
262 #undef CONFIG_FLASH_CFI_MTD
263 #undef CONFIG_CMD_JFFS2
264 #undef CONFIG_JFFS2_CMDLINE
267 /* additions for new relocation code, must be added to all boards */
268 #define CONFIG_SYS_SDRAM_BASE 0x00000000
269 /* Kirkwood has 2k of Security SRAM, use it for SP */
270 #define CONFIG_SYS_INIT_SP_ADDR 0xC8012000
271 /* Do early setups now in board_init_f() */
272 #define CONFIG_BOARD_EARLY_INIT_F
275 * resereved pram area at the end of memroy [hex]
276 * 8Mbytes for switch + 4Kbytes for bootcount
278 #define CONFIG_KM_RESERVED_PRAM 0x801000
279 /* address for the bootcount (taken from end of RAM) */
280 #define BOOTCOUNT_ADDR (CONFIG_KM_RESERVED_PRAM)
282 #endif /* _CONFIG_KM_ARM_H */