4 #define BOOTFLASH_START 0xF0000000
9 #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */
10 #define CONFIG_SYS_SDRAM_BASE2 (CONFIG_SYS_SDRAM_BASE + 0x10000000) /* +256M */
12 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \
13 DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
15 #define CFG_83XX_DDR_USES_CS0
18 * Manually set up DDR parameters
21 #define CONFIG_SYS_DDR_SIZE 2048 /* MB */
26 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
27 #define CONFIG_SYS_FLASH_BASE 0xF0000000
29 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
30 #define CONFIG_SYS_RAMBOOT
33 /* Reserve 768 kB for Mon */
34 #define CONFIG_SYS_MONITOR_LEN (768 * 1024)
37 * Initial RAM Base Address Setup
39 #define CONFIG_SYS_INIT_RAM_LOCK
40 #define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */
41 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* End of used area in RAM */
42 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
43 GENERATED_GBL_DATA_SIZE)
45 * Init Local Bus Memory Controller:
47 * Bank Bus Machine PortSz Size Device
48 * ---- --- ------- ------ ----- ------
49 * 0 Local GPCM 16 bit 256MB FLASH
50 * 1 Local GPCM 8 bit 128MB GPIO/PIGGY
55 * FLASH on the Local Bus
57 #define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */
59 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
60 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max num of sects on one chip */
61 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
66 #define CONFIG_SYS_NS16550_SERIAL
67 #define CONFIG_SYS_NS16550_REG_SIZE 1
68 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
70 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x4500)
71 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x4600)
74 #define CONFIG_SYS_I2C
75 #define CONFIG_SYS_NUM_I2C_BUSES 4
76 #define CONFIG_SYS_I2C_MAX_HOPS 1
77 #define CONFIG_SYS_I2C_FSL
78 #define CONFIG_SYS_FSL_I2C_SPEED 200000
79 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
80 #define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
81 #define CONFIG_SYS_I2C_OFFSET 0x3000
82 #define CONFIG_SYS_FSL_I2C2_SPEED 200000
83 #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
84 #define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100
85 #define CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP} }, \
86 {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
87 {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
88 {1, {I2C_NULL_HOP} } }
90 #if defined(CONFIG_CMD_NAND)
91 #define CONFIG_NAND_KMETER1
92 #define CONFIG_SYS_MAX_NAND_DEVICE 1
93 #define CONFIG_SYS_NAND_BASE CONFIG_SYS_KMBEC_FPGA_BASE
97 * For booting Linux, the board info and command line data
98 * have to be in the first 8 MB of memory, since this is
99 * the maximum mapped by the Linux kernel during initialization.
101 #define CONFIG_SYS_BOOTMAPSZ (8 << 20)
107 #ifndef CONFIG_SYS_RAMBOOT
108 #ifndef CONFIG_ENV_ADDR
109 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
110 CONFIG_SYS_MONITOR_LEN)
112 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */
113 #ifndef CONFIG_ENV_OFFSET
114 #define CONFIG_ENV_OFFSET (CONFIG_SYS_MONITOR_LEN)
117 /* Address and size of Redundant Environment Sector */
118 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
119 CONFIG_ENV_SECT_SIZE)
120 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
122 #else /* CFG_SYS_RAMBOOT */
123 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000)
124 #define CONFIG_ENV_SIZE 0x2000
125 #endif /* CFG_SYS_RAMBOOT */
128 * Environment Configuration
130 #define CONFIG_ENV_OVERWRITE
131 #ifndef CONFIG_KM_DEF_ENV /* if not set by keymile-common.h */
132 #define CONFIG_KM_DEF_ENV "km-common=empty\0"
135 #ifndef CONFIG_KM_DEF_ARCH
136 #define CONFIG_KM_DEF_ARCH "arch=ppc_82xx\0"
139 #define CONFIG_EXTRA_ENV_SETTINGS \
143 "prot off " __stringify(CONFIG_ENV_ADDR) " +0x40000 && " \
144 "era " __stringify(CONFIG_ENV_ADDR) " +0x40000\0" \
148 #if defined(CONFIG_UEC_ETH)
149 #define CONFIG_HAS_ETH0
153 * QE UEC ethernet configuration
155 #define CONFIG_UEC_ETH
156 #define CONFIG_ETHPRIME "UEC0"