3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * High Level Configuration Options
32 #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
33 #define CONFIG_MPC5200 1 /* especially an MPC5200 */
34 #define CONFIG_JUPITER 1 /* ... on Jupiter board */
37 * Valid values for CONFIG_SYS_TEXT_BASE are:
38 * 0xFFF00000 boot high (standard configuration)
39 * 0x00100000 boot from RAM (for testing only)
41 #ifndef CONFIG_SYS_TEXT_BASE
42 #define CONFIG_SYS_TEXT_BASE 0xFFF00000
45 #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
47 #define CONFIG_BOARD_EARLY_INIT_R 1
48 #define CONFIG_BOARD_EARLY_INIT_F 1
50 #define CONFIG_HIGH_BATS 1 /* High BATs supported */
53 * Serial console configuration
55 #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
56 #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
57 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
61 * 0x40000000 - 0x4fffffff - PCI Memory
62 * 0x50000000 - 0x50ffffff - PCI IO Space
64 /*#define CONFIG_PCI */
66 #if defined(CONFIG_PCI)
67 #define CONFIG_PCI_PNP 1
68 #define CONFIG_PCI_SCAN_SHOW 1
69 #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
71 #define CONFIG_PCI_MEM_BUS 0x40000000
72 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
73 #define CONFIG_PCI_MEM_SIZE 0x10000000
75 #define CONFIG_PCI_IO_BUS 0x50000000
76 #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
77 #define CONFIG_PCI_IO_SIZE 0x01000000
80 #define CONFIG_SYS_XLB_PIPELINING 1
82 #define CONFIG_NET_MULTI 1
84 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
87 #define CONFIG_MAC_PARTITION
88 #define CONFIG_DOS_PARTITION
89 #define CONFIG_ISO_PARTITION
91 #define CONFIG_TIMESTAMP /* Print image info with timestamp */
97 #define CONFIG_BOOTP_BOOTFILESIZE
98 #define CONFIG_BOOTP_BOOTPATH
99 #define CONFIG_BOOTP_GATEWAY
100 #define CONFIG_BOOTP_HOSTNAME
104 * Command line configuration.
106 #include <config_cmd_default.h>
108 #define CONFIG_CMD_NFS
109 #define CONFIG_CMD_SNTP
111 #if defined(CONFIG_PCI)
112 #define CODFIG_CMD_PCI
119 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
121 #define CONFIG_PREBOOT "echo;" \
122 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
125 #undef CONFIG_BOOTARGS
127 #define CONFIG_EXTRA_ENV_SETTINGS \
129 "nfsargs=setenv bootargs root=/dev/nfs rw " \
130 "nfsroot=${serverip}:${rootpath}\0" \
131 "ramargs=setenv bootargs root=/dev/ram rw\0" \
132 "addip=setenv bootargs ${bootargs} " \
133 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
134 ":${hostname}:${netdev}:off panic=1\0" \
135 "flash_nfs=run nfsargs addip addcons;" \
136 "bootm ${kernel_addr}\0" \
137 "flash_self=run ramargs addip;" \
138 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
139 "addcons=setenv bootargs ${bootargs} console=${contyp}," \
142 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;" \
144 "rootpath=/opt/eldk/ppc_6xx\0" \
145 "bootfile=/tftpboot/jupiter/uImage\0" \
148 #define CONFIG_BOOTCOMMAND "run flash_self"
151 * IPB Bus clocking configuration.
153 #undef CONFIG_SYS_IPBSPEED_133 /* define for 133MHz speed */
156 /* pass open firmware flat tree */
157 #define CONFIG_OF_LIBFDT 1
158 #define CONFIG_OF_BOARD_SETUP 1
160 #define OF_CPU "PowerPC,5200@0"
161 #define OF_SOC "soc5200@f0000000"
162 #define OF_TBCLK (bd->bi_busfreq / 8)
163 #define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
170 #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
171 #define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
173 #define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
174 #define CONFIG_SYS_I2C_SLAVE 0x7F
177 * EEPROM configuration
179 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
180 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
181 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
182 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
186 * Flash configuration
188 #define CONFIG_SYS_FLASH_BASE 0xFF000000
189 #define CONFIG_SYS_FLASH_SIZE 0x01000000
191 #define CONFIG_SYS_MAX_FLASH_SECT 128 /* max num of sects on one chip */
193 #define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE + 0x40000) /* third sector */
195 #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
196 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
198 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
200 #define CONFIG_FLASH_CFI_DRIVER
201 #define CONFIG_SYS_FLASH_CFI
202 #define CONFIG_SYS_FLASH_EMPTY_INFO
203 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
204 #define CONFIG_SYS_UPDATE_FLASH_SIZE 1
205 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
208 * Environment settings
210 #define CONFIG_ENV_IS_IN_FLASH 1
211 #define CONFIG_ENV_SIZE 0x20000
212 #define CONFIG_ENV_SECT_SIZE 0x20000
213 #define CONFIG_ENV_OVERWRITE 1
215 /* Address and size of Redundant Environment Sector */
216 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
217 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
222 #define CONFIG_SYS_MBAR 0xF0000000
223 #define CONFIG_SYS_SDRAM_BASE 0x00000000
224 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
226 /* Use SRAM until RAM will be available */
227 #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
228 #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
231 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
232 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
234 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
235 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
236 # define CONFIG_SYS_RAMBOOT 1
239 #define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
240 #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
241 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
244 * Ethernet configuration
246 #define CONFIG_MPC5xxx_FEC 1
247 #define CONFIG_MPC5xxx_FEC_MII100
249 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
251 /* #define CONFIG_MPC5xxx_FEC_MII10 */
252 #define CONFIG_PHY_ADDR 0x00
257 #define CONFIG_SYS_GPS_PORT_CONFIG 0x10000004
260 * Miscellaneous configurable options
262 #define CONFIG_SYS_LONGHELP /* undef to save memory */
263 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
265 #define CONFIG_CMDLINE_EDITING 1 /* add command line history */
266 #define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */
267 #ifdef CONFIG_SYS_HUSH_PARSER
268 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
270 #if defined(CONFIG_CMD_KGDB)
271 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
273 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
275 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
276 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
277 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
279 #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
280 #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
281 #define CONFIG_SYS_ALT_MEMTEST 1
283 #define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
285 #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
287 #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
288 #if defined(CONFIG_CMD_KGDB)
289 # define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
293 * Various low-level settings
295 #define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
296 #define CONFIG_SYS_HID0_FINAL HID0_ICE
298 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
299 #define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
300 #define CONFIG_SYS_BOOTCS_CFG 0x00047801
301 #define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
302 #define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
304 #define CONFIG_SYS_CS_BURST 0x00000000
305 #define CONFIG_SYS_CS_DEADCYCLE 0x33333333
307 #define CONFIG_SYS_RESET_ADDRESS 0xff000000
309 #endif /* __CONFIG_H */