3 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
5 * Configuation settings for the IXDP425 board.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * High Level Configuration Options
33 #define CONFIG_IXP425 1 /* This is an IXP425 CPU */
34 #define CONFIG_IXDP425 1 /* on an IXDP425 Board */
36 #define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info (and speed) */
37 #define CONFIG_DISPLAY_BOARDINFO 1 /* display board info */
39 /***************************************************************
40 * U-boot generic defines start here.
41 ***************************************************************/
43 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
46 * Size of malloc() pool
48 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
49 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
51 /* allow to overwrite serial and ethaddr */
52 #define CONFIG_ENV_OVERWRITE
54 #define CONFIG_BAUDRATE 115200
60 #define CONFIG_BOOTP_BOOTFILESIZE
61 #define CONFIG_BOOTP_BOOTPATH
62 #define CONFIG_BOOTP_GATEWAY
63 #define CONFIG_BOOTP_HOSTNAME
67 * Command line configuration.
69 #include <config_cmd_default.h>
71 #define CONFIG_CMD_ELF
72 #define CONFIG_CMD_PCI
76 #define CONFIG_IXP_PCI
77 #define CONFIG_NET_MULTI
78 #define CONFIG_EEPRO100
80 #define CONFIG_BOOTDELAY 3
81 /*#define CONFIG_ETHADDR 08:00:3e:26:0a:5b*/
82 #define CONFIG_NETMASK 255.255.255.0
83 #define CONFIG_IPADDR 192.168.0.21
84 #define CONFIG_SERVERIP 192.168.0.148
85 #define CONFIG_BOOTCOMMAND "bootm 50040000"
86 #define CONFIG_BOOTARGS "root=/dev/mtdblock2 rootfstype=cramfs console=ttyS0,115200"
87 #define CONFIG_CMDLINE_TAG
89 #if defined(CONFIG_CMD_KGDB)
90 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
91 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
95 * Miscellaneous configurable options
97 #define CONFIG_SYS_LONGHELP /* undef to save memory */
98 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
99 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
100 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
101 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
102 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
104 #define CONFIG_SYS_MEMTEST_START 0x00400000 /* memtest works on */
105 #define CONFIG_SYS_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */
107 #define CONFIG_SYS_LOAD_ADDR 0x00010000 /* default load address */
109 #define CONFIG_SYS_HZ 3333333 /* spec says 66.666 MHz, but it appears to be 33 */
110 /* valid baudrates */
111 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
116 * The stack sizes are set up in start.S using the settings below
118 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
119 #ifdef CONFIG_USE_IRQ
120 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
121 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
124 /***************************************************************
125 * Platform/Board specific defines start here.
126 ***************************************************************/
134 * select serial console configuration
136 #define CONFIG_IXP_SERIAL
137 #define CONFIG_SYS_IXP425_CONSOLE IXP425_UART1 /* we use UART1 for console */
140 * Physical Memory Map
142 #define CONFIG_NR_DRAM_BANKS 1 /* we have 2 banks of DRAM */
143 #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
144 #define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
146 #define PHYS_FLASH_1 0x50000000 /* Flash Bank #1 */
147 #define PHYS_FLASH_SIZE 0x00800000 /* 8 MB */
148 #define PHYS_FLASH_BANK_SIZE 0x00800000 /* 8 MB Banks */
149 #define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors (x1) */
151 #define CONFIG_SYS_DRAM_BASE 0x00000000
152 #define CONFIG_SYS_DRAM_SIZE 0x01000000
154 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
155 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
156 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
159 * Expansion bus settings
161 #define CONFIG_SYS_EXP_CS0 0xbcd23c42
166 #define CONFIG_SYS_SDR_CONFIG 0xd
167 #define CONFIG_SYS_SDR_MODE_CONFIG 0x1
168 #define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a
175 * FLASH and environment organization
178 * FLASH and environment organization
180 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
181 #define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
183 #define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
184 #define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
185 #define CONFIG_ENV_IS_IN_FLASH 1
187 #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 }
189 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */
191 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
192 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
194 #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
196 #define CONFIG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */
197 #define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x20000)
198 #define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
200 #endif /* __CONFIG_H */