include/configs/imx8qxp_mek.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2018 NXP
   4  */
   5
   6 #ifndef __IMX8QXP_MEK_H
   7 #define __IMX8QXP_MEK_H
   8
   9 #include <linux/sizes.h>
  10 #include <asm/arch/imx-regs.h>
  11
  12 #ifdef CONFIG_SPL_BUILD
  13 #define CONFIG_SPL_MAX_SIZE                             (124 * 1024)
  14 #define CONFIG_SYS_MONITOR_LEN                          (1024 * 1024)
  15 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
  16 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR         0x800
  17 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION              0
  18
  19 #define CONFIG_SPL_LDSCRIPT             "arch/arm/cpu/armv8/u-boot-spl.lds"
  20 #define CONFIG_SPL_STACK                0x013E000
  21 #define CONFIG_SPL_BSS_START_ADDR       0x00128000
  22 #define CONFIG_SPL_BSS_MAX_SIZE         0x1000  /* 4 KB */
  23 #define CONFIG_SYS_SPL_MALLOC_START     0x00120000
  24 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x3000  /* 12 KB */
  25 #define CONFIG_SERIAL_LPUART_BASE       0x5a060000
  26 #define CONFIG_MALLOC_F_ADDR            0x00120000
  27
  28 #define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
  29
  30 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
  31
  32 #define CONFIG_OF_EMBED
  33 #endif
  34
  35 #define CONFIG_REMAKE_ELF
  36
  37 #define CONFIG_BOARD_EARLY_INIT_F
  38
  39 /* Flat Device Tree Definitions */
  40 #define CONFIG_OF_BOARD_SETUP
  41
  42 #undef CONFIG_CMD_EXPORTENV
  43 #undef CONFIG_CMD_IMPORTENV
  44 #undef CONFIG_CMD_IMLS
  45
  46 #undef CONFIG_CMD_CRC32
  47
  48 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
  49 #define USDHC1_BASE_ADDR                0x5B010000
  50 #define USDHC2_BASE_ADDR                0x5B020000
  51
  52 #define CONFIG_ENV_OVERWRITE
  53
  54 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
  55
  56 /* Initial environment variables */
  57 #define CONFIG_EXTRA_ENV_SETTINGS               \
  58         "script=boot.scr\0" \
  59         "image=Image\0" \
  60         "panel=NULL\0" \
  61         "console=ttyLP0,${baudrate} earlycon\0" \
  62         "fdt_addr=0x83000000\0"                 \
  63         "fdt_high=0xffffffffffffffff\0"         \
  64         "boot_fdt=try\0" \
  65         "fdt_file=imx8qxp-mek.dtb\0" \
  66         "initrd_addr=0x83800000\0"              \
  67         "initrd_high=0xffffffffffffffff\0" \
  68         "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
  69         "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
  70         "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
  71         "mmcautodetect=yes\0" \
  72         "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
  73         "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  74         "bootscript=echo Running bootscript from mmc ...; " \
  75                 "source\0" \
  76         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  77         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  78         "mmcboot=echo Booting from mmc ...; " \
  79                 "run mmcargs; " \
  80                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  81                         "if run loadfdt; then " \
  82                                 "booti ${loadaddr} - ${fdt_addr}; " \
  83                         "else " \
  84                                 "echo WARN: Cannot load the DT; " \
  85                         "fi; " \
  86                 "else " \
  87                         "echo wait for boot; " \
  88                 "fi;\0" \
  89         "netargs=setenv bootargs console=${console} " \
  90                 "root=/dev/nfs " \
  91                 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
  92         "netboot=echo Booting from net ...; " \
  93                 "run netargs;  " \
  94                 "if test ${ip_dyn} = yes; then " \
  95                         "setenv get_cmd dhcp; " \
  96                 "else " \
  97                         "setenv get_cmd tftp; " \
  98                 "fi; " \
  99                 "${get_cmd} ${loadaddr} ${image}; " \
 100                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
 101                         "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
 102                                 "booti ${loadaddr} - ${fdt_addr}; " \
 103                         "else " \
 104                                 "echo WARN: Cannot load the DT; " \
 105                         "fi; " \
 106                 "else " \
 107                         "booti; " \
 108                 "fi;\0"
 109
 110 #define CONFIG_BOOTCOMMAND \
 111            "mmc dev ${mmcdev}; if mmc rescan; then " \
 112                    "if run loadbootscript; then " \
 113                            "run bootscript; " \
 114                    "else " \
 115                            "if run loadimage; then " \
 116                                    "run mmcboot; " \
 117                            "else run netboot; " \
 118                            "fi; " \
 119                    "fi; " \
 120            "else booti ${loadaddr} - ${fdt_addr}; fi"
 121
 122 /* Link Definitions */
 123 #define CONFIG_LOADADDR                 0x80280000
 124
 125 #define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
 126
 127 #define CONFIG_SYS_INIT_SP_ADDR         0x80200000
 128
 129 /* Default environment is in SD */
 130 #define CONFIG_ENV_SIZE                 0x1000
 131 #define CONFIG_ENV_OFFSET               (64 * SZ_64K)
 132 #define CONFIG_SYS_MMC_ENV_PART         0       /* user area */
 133
 134 #define CONFIG_SYS_MMC_IMG_LOAD_PART    1
 135
 136 /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */
 137 #define CONFIG_SYS_MMC_ENV_DEV          1   /* USDHC2 */
 138 #define CONFIG_MMCROOT                  "/dev/mmcblk1p2"  /* USDHC2 */
 139 #define CONFIG_SYS_FSL_USDHC_NUM        2
 140
 141 /* Size of malloc() pool */
 142 #define CONFIG_SYS_MALLOC_LEN           ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024)
 143
 144 #define CONFIG_SYS_SDRAM_BASE           0x80000000
 145 #define PHYS_SDRAM_1                    0x80000000
 146 #define PHYS_SDRAM_2                    0x880000000
 147 #define PHYS_SDRAM_1_SIZE               0x80000000      /* 2 GB */
 148 /* LPDDR4 board total DDR is 3GB */
 149 #define PHYS_SDRAM_2_SIZE               0x40000000      /* 1 GB */
 150
 151 /* Serial */
 152 #define CONFIG_BAUDRATE                 115200
 153
 154 /* Generic Timer Definitions */
 155 #define COUNTER_FREQUENCY               8000000 /* 8MHz */
 156
 157 #ifndef CONFIG_DM_PCA953X
 158 #define CONFIG_PCA953X
 159 #define CONFIG_CMD_PCA953X
 160 #define CONFIG_CMD_PCA953X_INFO
 161 #endif
 162
 163 /* Networking */
 164 #define CONFIG_FEC_XCV_TYPE             RGMII
 165 #define FEC_QUIRK_ENET_MAC
 166
 167 #endif /* __IMX8QXP_MEK_H */