include/configs/imgtec_xilfpga.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright (C) 2016, Imagination Technologies Ltd.
   4  *
   5  * Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
   6  *
   7  * Imagination Technologies Ltd. MIPSfpga
   8  */
   9
  10 #ifndef __XILFPGA_CONFIG_H
  11 #define __XILFPGA_CONFIG_H
  12
  13 /* BootROM + MIG is pretty smart. DDR and Cache initialized */
  14 #define CONFIG_SKIP_LOWLEVEL_INIT
  15
  16 /*--------------------------------------------
  17  * CPU configuration
  18  */
  19 /* CPU Timer rate */
  20 #define CONFIG_SYS_MIPS_TIMER_FREQ      50000000
  21
  22 /* Cache Configuration */
  23 #define CONFIG_SYS_MIPS_CACHE_MODE      CONF_CM_CACHABLE_NONCOHERENT
  24
  25 /*----------------------------------------------------------------------
  26  * Memory Layout
  27  */
  28
  29 /* SDRAM Configuration (for final code, data, stack, heap) */
  30 #define CONFIG_SYS_SDRAM_BASE           0x80000000
  31 #define CONFIG_SYS_SDRAM_SIZE           0x08000000      /* 128 Mbytes */
  32 #define CONFIG_SYS_INIT_SP_ADDR         \
  33         (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - 0x1000)
  34
  35 #define CONFIG_SYS_MALLOC_LEN           (256 << 10)
  36 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_TEXT_BASE
  37 #define CONFIG_SYS_LOAD_ADDR            0x80500000 /* default load address */
  38
  39 /*----------------------------------------------------------------------
  40  * Commands
  41  */
  42
  43 /*------------------------------------------------------------
  44  * Console Configuration
  45  */
  46 #define CONFIG_SYS_CBSIZE               1024 /* Console I/O Buffer Size   */
  47
  48 /* -------------------------------------------------
  49  * Environment
  50  */
  51 #define CONFIG_ENV_SIZE         0x4000
  52
  53 /* ---------------------------------------------------------------------
  54  * Board boot configuration
  55  */
  56 #define CONFIG_TIMESTAMP        /* Print image info with timestamp */
  57
  58 #endif  /* __XILFPGA_CONFIG_H */