2 * Common configuration settings for IGEP technology based boards
5 * ISEE 2007 SL, <www.iseebcn.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #include <asm/sizes.h>
29 * High Level Configuration Options
31 #define CONFIG_OMAP 1 /* in a TI OMAP core */
32 #define CONFIG_OMAP34XX 1 /* which is a 34XX */
34 #define CONFIG_SDRC /* The chip has SDRC controller */
36 #include <asm/arch/cpu.h>
37 #include <asm/arch/omap3.h>
40 * Display CPU and Board information
42 #define CONFIG_DISPLAY_CPUINFO 1
43 #define CONFIG_DISPLAY_BOARDINFO 1
46 #define V_OSCK 26000000 /* Clock output from T2 */
47 #define V_SCLK (V_OSCK >> 1)
49 #define CONFIG_MISC_INIT_R
51 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
52 #define CONFIG_SETUP_MEMORY_TAGS 1
53 #define CONFIG_INITRD_TAG 1
54 #define CONFIG_REVISION_TAG 1
56 #define CONFIG_OF_LIBFDT 1
59 * NS16550 Configuration
62 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
64 #define CONFIG_SYS_NS16550
65 #define CONFIG_SYS_NS16550_SERIAL
66 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
67 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
69 /* select serial console configuration */
70 #define CONFIG_CONS_INDEX 3
71 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
72 #define CONFIG_SERIAL3 3
74 /* allow to overwrite serial and ethaddr */
75 #define CONFIG_ENV_OVERWRITE
76 #define CONFIG_BAUDRATE 115200
77 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
79 #define CONFIG_GENERIC_MMC 1
81 #define CONFIG_OMAP_HSMMC 1
82 #define CONFIG_DOS_PARTITION 1
85 #define CONFIG_MUSB_UDC 1
86 #define CONFIG_USB_OMAP3 1
87 #define CONFIG_TWL4030_USB 1
89 /* USB device configuration */
90 #define CONFIG_USB_DEVICE 1
91 #define CONFIG_USB_TTY 1
92 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
94 /* Change these to suit your needs */
95 #define CONFIG_USBD_VENDORID 0x0451
96 #define CONFIG_USBD_PRODUCTID 0x5678
97 #define CONFIG_USBD_MANUFACTURER "Texas Instruments"
98 #define CONFIG_USBD_PRODUCT_NAME "IGEP"
100 /* commands to include */
101 #include <config_cmd_default.h>
103 #define CONFIG_CMD_CACHE
104 #define CONFIG_CMD_EXT2 /* EXT2 Support */
105 #define CONFIG_CMD_FAT /* FAT support */
106 #define CONFIG_CMD_I2C /* I2C serial bus support */
107 #define CONFIG_CMD_MMC /* MMC support */
108 #ifdef CONFIG_BOOT_ONENAND
109 #define CONFIG_CMD_ONENAND /* ONENAND support */
111 #ifdef CONFIG_BOOT_NAND
112 #define CONFIG_CMD_NAND
114 #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
115 #define CONFIG_CMD_DHCP
116 #define CONFIG_CMD_PING
117 #define CONFIG_CMD_NFS /* NFS support */
118 #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
119 #define CONFIG_MTD_DEVICE
121 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
122 #undef CONFIG_CMD_IMLS /* List all found images */
124 #define CONFIG_SYS_NO_FLASH
125 #define CONFIG_HARD_I2C 1
126 #define CONFIG_SYS_I2C_SPEED 100000
127 #define CONFIG_SYS_I2C_SLAVE 1
128 #define CONFIG_SYS_I2C_BUS 0
129 #define CONFIG_SYS_I2C_BUS_SELECT 1
130 #define CONFIG_DRIVER_OMAP34XX_I2C 1
135 #define CONFIG_TWL4030_POWER 1
137 #define CONFIG_BOOTDELAY 3
139 #define CONFIG_EXTRA_ENV_SETTINGS \
141 "loadaddr=0x82000000\0" \
143 "console=ttyO2,115200n8\0" \
146 "dvimode=1024x768MR-16@60\0" \
147 "defaultdisplay=dvi\0" \
149 "mmcroot=/dev/mmcblk0p2 rw\0" \
150 "mmcrootfstype=ext4 rootwait\0" \
151 "nandroot=/dev/mtdblock4 rw\0" \
152 "nandrootfstype=jffs2\0" \
153 "mmcargs=setenv bootargs console=${console} " \
154 "mpurate=${mpurate} " \
156 "omapfb.mode=dvi:${dvimode} " \
158 "omapdss.def_disp=${defaultdisplay} " \
160 "rootfstype=${mmcrootfstype}\0" \
161 "nandargs=setenv bootargs console=${console} " \
162 "mpurate=${mpurate} " \
164 "omapfb.mode=dvi:${dvimode} " \
166 "omapdss.def_disp=${defaultdisplay} " \
167 "root=${nandroot} " \
168 "rootfstype=${nandrootfstype}\0" \
169 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
170 "importbootenv=echo Importing environment from mmc ...; " \
171 "env import -t $loadaddr $filesize\0" \
172 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
173 "mmcboot=echo Booting from mmc ...; " \
175 "bootm ${loadaddr}\0" \
176 "nandboot=echo Booting from onenand ...; " \
178 "onenand read ${loadaddr} 280000 400000; " \
179 "bootm ${loadaddr}\0" \
181 #define CONFIG_BOOTCOMMAND \
182 "if mmc rescan ${mmcdev}; then " \
183 "echo SD/MMC found on device ${mmcdev};" \
184 "if run loadbootenv; then " \
185 "run importbootenv;" \
187 "if test -n $uenvcmd; then " \
188 "echo Running uenvcmd ...;" \
191 "if run loaduimage; then " \
197 #define CONFIG_AUTO_COMPLETE 1
200 * Miscellaneous configurable options
202 #define CONFIG_SYS_LONGHELP /* undef to save memory */
203 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
204 #define CONFIG_SYS_PROMPT "U-Boot # "
205 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
206 /* Print Buffer Size */
207 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
208 sizeof(CONFIG_SYS_PROMPT) + 16)
209 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
210 /* Boot Argument Buffer Size */
211 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
213 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */
215 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
216 0x01F00000) /* 31MB */
218 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
221 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
224 * OMAP3 has 12 GP timers, they can be driven by the system clock
225 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
226 * This rate is divided by a local divisor.
228 #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
229 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
230 #define CONFIG_SYS_HZ 1000
235 * The stack sizes are set up in start.S using the settings below
237 #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
240 * Physical Memory Map
243 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
244 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
245 #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 meg */
246 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
249 * FLASH and environment organization
252 #ifdef CONFIG_BOOT_ONENAND
253 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M /* Configure the PISMO */
255 #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
257 #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
259 #define CONFIG_ENV_IS_IN_ONENAND 1
260 #define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */
261 #define CONFIG_ENV_ADDR ONENAND_ENV_OFFSET
264 #ifdef CONFIG_BOOT_NAND
265 #define PISMO1_NAND_SIZE GPMC_SIZE_128M /* Configure the PISMO */
266 #define CONFIG_NAND_OMAP_GPMC
267 #define CONFIG_SYS_NAND_BASE NAND_BASE
268 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1
269 #define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */
270 #define CONFIG_ENV_IS_IN_NAND 1
271 #define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */
272 #define CONFIG_ENV_ADDR NAND_ENV_OFFSET
273 #define CONFIG_SYS_MAX_NAND_DEVICE 1
277 * Size of malloc() pool
279 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
284 #if defined(CONFIG_CMD_NET)
285 #define CONFIG_SMC911X
286 #define CONFIG_SMC911X_32_BIT
287 #define CONFIG_SMC911X_BASE 0x2C000000
288 #endif /* (CONFIG_CMD_NET) */
291 * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader
292 * and older u-boot.bin with the new U-Boot SPL.
294 #define CONFIG_SYS_TEXT_BASE 0x80008000
295 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
296 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
297 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
298 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
299 CONFIG_SYS_INIT_RAM_SIZE - \
300 GENERATED_GBL_DATA_SIZE)
304 #define CONFIG_SPL_NAND_SIMPLE
305 #define CONFIG_SPL_TEXT_BASE 0x40200800
306 #define CONFIG_SPL_MAX_SIZE (54 * 1024)
307 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
309 /* move malloc and bss high to prevent clashing with the main image */
310 #define CONFIG_SYS_SPL_MALLOC_START 0x87000000
311 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
312 #define CONFIG_SPL_BSS_START_ADDR 0x87080000 /* end of minimum RAM */
313 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
315 /* MMC boot config */
316 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
317 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
318 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
319 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
321 #define CONFIG_SPL_LIBCOMMON_SUPPORT
322 #define CONFIG_SPL_LIBDISK_SUPPORT
323 #define CONFIG_SPL_I2C_SUPPORT
324 #define CONFIG_SPL_LIBGENERIC_SUPPORT
325 #define CONFIG_SPL_MMC_SUPPORT
326 #define CONFIG_SPL_FAT_SUPPORT
327 #define CONFIG_SPL_SERIAL_SUPPORT
329 #define CONFIG_SPL_POWER_SUPPORT
330 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
332 #ifdef CONFIG_BOOT_ONENAND
333 #define CONFIG_SPL_ONENAND_SUPPORT
335 /* OneNAND boot config */
336 #define CONFIG_SYS_ONENAND_U_BOOT_OFFS 0x80000
337 #define CONFIG_SYS_ONENAND_PAGE_SIZE 2048
338 #define CONFIG_SPL_ONENAND_LOAD_ADDR 0x80000
339 #define CONFIG_SPL_ONENAND_LOAD_SIZE \
340 (512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR)
344 #ifdef CONFIG_BOOT_NAND
345 #define CONFIG_SPL_NAND_SUPPORT
347 /* NAND boot config */
348 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
349 #define CONFIG_SYS_NAND_PAGE_COUNT 64
350 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
351 #define CONFIG_SYS_NAND_OOBSIZE 64
352 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
353 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
354 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
356 #define CONFIG_SYS_NAND_ECCSIZE 512
357 #define CONFIG_SYS_NAND_ECCBYTES 3
358 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
359 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
362 #endif /* __IGEP00X0_H */