2 * Copyright (C) Stefano Babic <sbabic@denx.de>
4 * Configuration settings for the E+L i.MX6Q DO82 board.
6 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef __EL6Q_COMMON_CONFIG_H
10 #define __EL6Q_COMMON_CONFIG_H
12 #define CONFIG_BOARD_NAME EL6Q
14 #include <config_distro_defaults.h>
15 #include "mx6_common.h"
17 #define CONFIG_IMX_THERMAL
19 /* Size of malloc() pool */
20 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
22 #define CONFIG_BOARD_EARLY_INIT_F
23 #define CONFIG_BOARD_LATE_INIT
25 #define CONFIG_MXC_UART
28 #define CONFIG_SPL_SPI_SUPPORT
29 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
30 #define CONFIG_SPL_SPI_LOAD
35 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
36 #define CONFIG_SYS_FSL_USDHC_NUM 2
39 #define CONFIG_SYS_I2C
40 #define CONFIG_SYS_I2C_MXC
41 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
42 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
43 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
44 #define CONFIG_SYS_I2C_SPEED 100000
48 #define CONFIG_POWER_I2C
49 #define CONFIG_POWER_PFUZE100
50 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
53 #define CONFIG_MXC_SPI
54 #define CONFIG_SF_DEFAULT_BUS 3
55 #define CONFIG_SF_DEFAULT_CS 0
56 #define CONFIG_SF_DEFAULT_SPEED 20000000
57 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
59 /* allow to overwrite serial and ethaddr */
60 #define CONFIG_ENV_OVERWRITE
61 #define CONFIG_MXC_UART_BASE UART2_BASE
62 #define CONFIG_BAUDRATE 115200
64 /* Command definition */
66 #define CONFIG_CMD_BMODE
67 #define CONFIG_CMD_BOOTZ
68 #undef CONFIG_CMD_IMLS
70 #define CONFIG_BOARD_NAME EL6Q
72 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
73 #define CONFIG_EXTRA_ENV_SETTINGS \
74 "board="__stringify(CONFIG_BOARD_NAME)"\0" \
75 "cma_size="__stringify(EL6Q_CMA_SIZE)"\0" \
76 "chp_size="__stringify(EL6Q_COHERENT_POOL_SIZE)"\0" \
77 "console=" CONFIG_CONSOLE_DEV "\0" \
78 "fdtfile=undefined\0" \
79 "fdt_high=0xffffffff\0" \
80 "fdt_addr_r=0x18000000\0" \
81 "fdt_addr=0x18000000\0" \
82 "findfdt=setenv fdtfile " CONFIG_DEFAULT_FDT_FILE "\0" \
83 "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
84 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
85 "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
88 #define BOOT_TARGET_DEVICES(func) \
94 #define CONFIG_BOOTCOMMAND \
98 #include <config_distro_bootcmd.h>
100 #define CONFIG_ARP_TIMEOUT 200UL
102 #define CONFIG_CMD_MEMTEST
104 #define CONFIG_SYS_MEMTEST_START 0x10000000
105 #define CONFIG_SYS_MEMTEST_END 0x10800000
106 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
108 #define CONFIG_STACKSIZE (128 * 1024)
110 /* Physical Memory Map */
111 #define CONFIG_NR_DRAM_BANKS 1
112 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
114 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
115 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
116 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
118 #define CONFIG_SYS_INIT_SP_OFFSET \
119 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
120 #define CONFIG_SYS_INIT_SP_ADDR \
121 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
123 /* FLASH and environment organization */
124 #define CONFIG_SYS_NO_FLASH
126 #define CONFIG_ENV_SIZE (8 * 1024)
128 #define CONFIG_ENV_IS_IN_MMC
130 #if defined(CONFIG_ENV_IS_IN_MMC)
131 #define CONFIG_SYS_MMC_ENV_DEV 1
132 #define CONFIG_SYS_MMC_ENV_PART 2
133 #define CONFIG_ENV_OFFSET 0x0
136 #endif /* __EL6Q_COMMON_CONFIG_H */