2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
4 * (C) Copyright 2009 Freescale Semiconductor, Inc.
6 * Configuration settings for the MX51EVK Board
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 #include <config_cmd_default.h>
30 * High Level Board Configuration Options
35 #define machine_is_efikamx() (CONFIG_MACH_TYPE == MACH_TYPE_MX51_EFIKAMX)
36 #define machine_is_efikasb() (CONFIG_MACH_TYPE == MACH_TYPE_MX51_EFIKASB)
38 #include <asm/arch/imx-regs.h>
40 #define CONFIG_SYS_MX5_HCLK 24000000
41 #define CONFIG_SYS_MX5_CLK32 32768
42 #define CONFIG_DISPLAY_CPUINFO
43 #define CONFIG_DISPLAY_BOARDINFO
45 #define CONFIG_SYS_TEXT_BASE 0x97800000
48 * Bootloader Components Configuration
50 #define CONFIG_CMD_SPI
52 #define CONFIG_CMD_MMC
53 #define CONFIG_CMD_FAT
54 #define CONFIG_CMD_EXT2
55 #define CONFIG_CMD_IDE
56 #undef CONFIG_CMD_IMLS
59 * Environmental settings
62 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
63 #define CONFIG_ENV_SECT_SIZE (1 * 64 * 1024)
64 #define CONFIG_ENV_SIZE (4 * 1024)
69 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
70 #define CONFIG_REVISION_TAG
71 #define CONFIG_SETUP_MEMORY_TAGS
72 #define CONFIG_INITRD_TAG
74 #define CONFIG_OF_LIBFDT 1
77 * Size of malloc() pool
79 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
81 #define CONFIG_BOARD_EARLY_INIT_F
82 #define CONFIG_BOARD_LATE_INIT
87 #define CONFIG_MXC_UART
88 #define CONFIG_SYS_MX51_UART1
89 #define CONFIG_CONS_INDEX 1
90 #define CONFIG_BAUDRATE 115200
91 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
93 #define CONFIG_MXC_GPIO
100 #define CONFIG_HARD_SPI
101 #define CONFIG_MXC_SPI
102 #define CONFIG_DEFAULT_SPI_BUS 1
103 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
108 #define CONFIG_SPI_FLASH
109 #define CONFIG_SPI_FLASH_SST
110 #define CONFIG_SPI_FLASH_CS (1 | 121 << 8)
111 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
112 #define CONFIG_SF_DEFAULT_SPEED 25000000
114 #define CONFIG_ENV_SPI_CS (1 | 121 << 8)
115 #define CONFIG_ENV_SPI_BUS 0
116 #define CONFIG_ENV_SPI_MAX_HZ 25000000
117 #define CONFIG_ENV_SPI_MODE (SPI_MODE_0)
118 #define CONFIG_FSL_ENV_IN_SF
119 #define CONFIG_ENV_IS_IN_SPI_FLASH
120 #define CONFIG_SYS_NO_FLASH
123 #define CONFIG_ENV_IS_NOWHERE
128 #define CONFIG_PMIC_SPI
129 #define CONFIG_PMIC_FSL
130 #define CONFIG_FSL_PMIC_BUS 0
131 #define CONFIG_FSL_PMIC_CS (0 | 120 << 8)
132 #define CONFIG_FSL_PMIC_CLK 25000000
133 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
134 #define CONFIG_FSL_PMIC_BITLEN 32
135 #define CONFIG_RTC_MC13XXX
141 #ifdef CONFIG_CMD_MMC
143 #define CONFIG_GENERIC_MMC
144 #define CONFIG_FSL_ESDHC
145 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
146 #define CONFIG_SYS_FSL_ESDHC_NUM 2
152 #ifdef CONFIG_CMD_IDE
154 #undef CONFIG_IDE_LED
155 #undef CONFIG_IDE_RESET
157 #define CONFIG_MX51_PATA
161 #define CONFIG_SYS_IDE_MAXBUS 1
162 #define CONFIG_SYS_IDE_MAXDEVICE 1
164 #define CONFIG_SYS_ATA_BASE_ADDR 0x83fe0000
165 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0
167 #define CONFIG_SYS_ATA_DATA_OFFSET 0xa0
168 #define CONFIG_SYS_ATA_REG_OFFSET 0xa0
169 #define CONFIG_SYS_ATA_ALT_OFFSET 0xd8
171 #define CONFIG_SYS_ATA_STRIDE 4
173 #define CONFIG_IDE_PREINIT
174 #define CONFIG_MXC_ATA_PIO_MODE 4
180 #ifdef CONFIG_CMD_FAT
181 #define CONFIG_DOS_PARTITION
184 #undef CONFIG_CMD_PING
185 #undef CONFIG_CMD_DHCP
186 #undef CONFIG_CMD_NET
187 #undef CONFIG_CMD_NFS
188 #define CONFIG_CMD_DATE
191 * Miscellaneous configurable options
193 #define CONFIG_ENV_OVERWRITE
194 #define CONFIG_BOOTDELAY 3
195 #define CONFIG_LOADADDR 0x90800000
197 #define CONFIG_SYS_LONGHELP /* undef to save memory */
198 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
199 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
200 #define CONFIG_SYS_PROMPT "Efika> "
201 #define CONFIG_AUTO_COMPLETE
202 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
203 /* Print Buffer Size */
204 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
205 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
206 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
208 #define CONFIG_SYS_MEMTEST_START 0x90000000
209 #define CONFIG_SYS_MEMTEST_END 0x10000
211 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
213 #define CONFIG_SYS_HZ 1000
214 #define CONFIG_CMDLINE_EDITING
216 /*-----------------------------------------------------------------------
219 * The stack sizes are set up in start.S using the settings below
221 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
223 /*-----------------------------------------------------------------------
224 * Physical Memory Map
226 #define CONFIG_NR_DRAM_BANKS 1
227 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
228 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
230 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
231 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
232 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
234 #define CONFIG_SYS_INIT_SP_OFFSET \
235 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
236 #define CONFIG_SYS_INIT_SP_ADDR \
237 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
239 #define CONFIG_SYS_DDR_CLKSEL 0
240 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35145