2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
4 * (C) Copyright 2009 Freescale Semiconductor, Inc.
6 * Configuration settings for the MX51EVK Board
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 #include <config_cmd_default.h>
30 * High Level Board Configuration Options
34 #include <asm/arch/imx-regs.h>
36 #define CONFIG_SYS_MX5_HCLK 24000000
37 #define CONFIG_SYS_MX5_CLK32 32768
38 #define CONFIG_DISPLAY_CPUINFO
39 #define CONFIG_DISPLAY_BOARDINFO
41 #define CONFIG_SYS_TEXT_BASE 0x97800000
44 * Bootloader Components Configuration
46 #define CONFIG_CMD_SPI
48 #define CONFIG_CMD_MMC
49 #define CONFIG_CMD_FAT
50 #define CONFIG_CMD_EXT2
51 #define CONFIG_CMD_IDE
52 #undef CONFIG_CMD_IMLS
55 * Environmental settings
58 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
59 #define CONFIG_ENV_SECT_SIZE (1 * 64 * 1024)
60 #define CONFIG_ENV_SIZE (4 * 1024)
65 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
66 #define CONFIG_REVISION_TAG
67 #define CONFIG_SETUP_MEMORY_TAGS
68 #define CONFIG_INITRD_TAG
70 #define CONFIG_OF_LIBFDT 1
73 * Size of malloc() pool
75 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
77 #define CONFIG_BOARD_EARLY_INIT_F
78 #define BOARD_LATE_INIT
83 #define CONFIG_MXC_UART
84 #define CONFIG_SYS_MX51_UART1
85 #define CONFIG_CONS_INDEX 1
86 #define CONFIG_BAUDRATE 115200
87 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
89 #define CONFIG_MXC_GPIO
96 #define CONFIG_HARD_SPI
97 #define CONFIG_MXC_SPI
98 #define CONFIG_DEFAULT_SPI_BUS 1
99 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
104 #define CONFIG_SPI_FLASH
105 #define CONFIG_SPI_FLASH_SST
106 #define CONFIG_SPI_FLASH_CS (1 | 121 << 8)
107 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
108 #define CONFIG_SF_DEFAULT_SPEED 25000000
110 #define CONFIG_ENV_SPI_CS (1 | 121 << 8)
111 #define CONFIG_ENV_SPI_BUS 0
112 #define CONFIG_ENV_SPI_MAX_HZ 25000000
113 #define CONFIG_ENV_SPI_MODE (SPI_MODE_0)
114 #define CONFIG_FSL_ENV_IN_SF
115 #define CONFIG_ENV_IS_IN_SPI_FLASH
116 #define CONFIG_SYS_NO_FLASH
119 #define CONFIG_ENV_IS_NOWHERE
123 #define CONFIG_FSL_PMIC
124 #define CONFIG_FSL_PMIC_BUS 0
125 #define CONFIG_FSL_PMIC_CS (0 | 120 << 8)
126 #define CONFIG_FSL_PMIC_CLK 25000000
127 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
128 #define CONFIG_RTC_MC13783
134 #ifdef CONFIG_CMD_MMC
136 #define CONFIG_GENERIC_MMC
137 #define CONFIG_FSL_ESDHC
138 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
139 #define CONFIG_SYS_FSL_ESDHC_NUM 2
145 #ifdef CONFIG_CMD_IDE
147 #undef CONFIG_IDE_LED
148 #undef CONFIG_IDE_RESET
150 #define CONFIG_MX51_PATA
154 #define CONFIG_SYS_IDE_MAXBUS 1
155 #define CONFIG_SYS_IDE_MAXDEVICE 1
157 #define CONFIG_SYS_ATA_BASE_ADDR 0x83fe0000
158 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0
160 #define CONFIG_SYS_ATA_DATA_OFFSET 0xa0
161 #define CONFIG_SYS_ATA_REG_OFFSET 0xa0
162 #define CONFIG_SYS_ATA_ALT_OFFSET 0xd8
164 #define CONFIG_SYS_ATA_STRIDE 4
166 #define CONFIG_IDE_PREINIT
167 #define CONFIG_MXC_ATA_PIO_MODE 4
173 #ifdef CONFIG_CMD_FAT
174 #define CONFIG_DOS_PARTITION
177 #undef CONFIG_CMD_PING
178 #undef CONFIG_CMD_DHCP
179 #undef CONFIG_CMD_NET
180 #undef CONFIG_CMD_NFS
181 #define CONFIG_CMD_DATE
184 * Miscellaneous configurable options
186 #define CONFIG_ENV_OVERWRITE
187 #define CONFIG_BOOTDELAY 3
188 #define CONFIG_LOADADDR 0x90800000
190 #define CONFIG_SYS_LONGHELP /* undef to save memory */
191 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
192 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
193 #define CONFIG_SYS_PROMPT "Efika> "
194 #define CONFIG_AUTO_COMPLETE
195 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
196 /* Print Buffer Size */
197 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
198 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
199 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
201 #define CONFIG_SYS_MEMTEST_START 0x90000000
202 #define CONFIG_SYS_MEMTEST_END 0x10000
204 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
206 #define CONFIG_SYS_HZ 1000
207 #define CONFIG_CMDLINE_EDITING
209 /*-----------------------------------------------------------------------
212 * The stack sizes are set up in start.S using the settings below
214 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
216 /*-----------------------------------------------------------------------
217 * Physical Memory Map
219 #define CONFIG_NR_DRAM_BANKS 1
220 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
221 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
223 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
224 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
225 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
227 #define CONFIG_SYS_INIT_SP_OFFSET \
228 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
229 #define CONFIG_SYS_INIT_SP_ADDR \
230 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
232 #define CONFIG_SYS_DDR_CLKSEL 0
233 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100