1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * DHCOM DH-iMX6 PDK board configuration
5 * Copyright (C) 2017 Marek Vasut <marex@denx.de>
8 #ifndef __DH_IMX6_CONFIG_H
9 #define __DH_IMX6_CONFIG_H
11 #include <asm/arch/imx-regs.h>
13 #include "mx6_common.h"
17 * 0x00_0000-0x00_ffff ... U-Boot SPL
18 * 0x01_0000-0x0f_ffff ... U-Boot
19 * 0x10_0000-0x10_ffff ... U-Boot env #1
20 * 0x11_0000-0x11_ffff ... U-Boot env #2
21 * 0x12_0000-0x1f_ffff ... UNUSED
25 #include "imx6_spl.h" /* common IMX6 SPL configuration */
26 #define CONFIG_SPL_TARGET "u-boot-with-spl.imx"
28 /* Miscellaneous configurable options */
30 #define CONFIG_CMDLINE_TAG
31 #define CONFIG_SETUP_MEMORY_TAGS
32 #define CONFIG_INITRD_TAG
33 #define CONFIG_REVISION_TAG
37 /* Size of malloc() pool */
38 #define CONFIG_SYS_MALLOC_LEN (4 * SZ_1M)
41 #define CONFIG_SYS_BOOTCOUNT_BE
44 #define IMX_FEC_BASE ENET_BASE_ADDR
45 #define CONFIG_FEC_XCV_TYPE RMII
46 #define CONFIG_ETHPRIME "FEC"
47 #define CONFIG_FEC_MXC_PHYADDR 0
48 #define CONFIG_ARP_TIMEOUT 200UL
51 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
52 #define CONFIG_SYS_FSL_USDHC_NUM 3
53 #define CONFIG_SYS_MMC_ENV_DEV 2 /* 1 = SDHC3, 2 = SDHC4 (eMMC) */
58 /* SPI Flash Configs */
59 #if defined(CONFIG_SPL_BUILD)
61 #undef CONFIG_DM_SPI_FLASH
65 #define CONFIG_MXC_UART
66 #define CONFIG_MXC_UART_BASE UART1_BASE
67 #define CONFIG_BAUDRATE 115200
71 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
72 #define CONFIG_USB_HOST_ETHER
73 #define CONFIG_USB_ETHER_ASIX
74 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
75 #define CONFIG_MXC_USB_FLAGS 0
76 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
78 /* USB Gadget (DFU, UMS) */
79 #if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE)
80 #define CONFIG_SYS_DFU_DATA_BUF_SIZE (16 * 1024 * 1024)
81 #define DFU_DEFAULT_POLL_TIMEOUT 300
84 #define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525
85 #define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5
90 #if defined(CONFIG_SPL_BUILD)
92 #undef CONFIG_WATCHDOG
93 #define CONFIG_HW_WATCHDOG
96 /* allow to overwrite serial and ethaddr */
97 #define CONFIG_ENV_OVERWRITE
99 #define CONFIG_LOADADDR 0x12000000
100 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
102 #ifndef CONFIG_SPL_BUILD
103 #define CONFIG_EXTRA_ENV_SETTINGS \
104 "console=ttymxc0,115200\0" \
105 "fdt_addr=0x18000000\0" \
106 "fdt_high=0xffffffff\0" \
107 "initrd_high=0xffffffff\0" \
108 "kernel_addr_r=0x10008000\0" \
109 "fdt_addr_r=0x13000000\0" \
110 "ramdisk_addr_r=0x18000000\0" \
111 "scriptaddr=0x14000000\0" \
112 "fdtfile=imx6q-dhcom-pdk2.dtb\0"\
115 #define CONFIG_BOOTCOMMAND "run distro_bootcmd"
117 #define BOOT_TARGET_DEVICES(func) \
121 func(SATA, sata, 0) \
124 #include <config_distro_bootcmd.h>
127 /* Physical Memory Map */
128 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
130 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
131 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
132 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
134 #define CONFIG_SYS_INIT_SP_OFFSET \
135 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
137 #define CONFIG_SYS_INIT_SP_ADDR \
138 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
140 #define CONFIG_SYS_MEMTEST_START 0x10000000
141 #define CONFIG_SYS_MEMTEST_END 0x20000000
142 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
146 #endif /* __DH_IMX6_CONFIG_H */