ARM: configs: Add da850evm_nand to boot from NAND
[oweals/u-boot.git] / include / configs / devkit3250.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Embest/Timll DevKit3250 board configuration file
4  *
5  * Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com>
6  */
7
8 #ifndef __CONFIG_DEVKIT3250_H__
9 #define __CONFIG_DEVKIT3250_H__
10
11 /* SoC and board defines */
12 #include <linux/sizes.h>
13 #include <asm/arch/cpu.h>
14
15 #define CONFIG_MACH_TYPE                MACH_TYPE_DEVKIT3250
16
17 #define CONFIG_SYS_ICACHE_OFF
18 #define CONFIG_SYS_DCACHE_OFF
19 #if !defined(CONFIG_SPL_BUILD)
20 #define CONFIG_SKIP_LOWLEVEL_INIT
21 #endif
22
23 /*
24  * Memory configurations
25  */
26 #define CONFIG_SYS_MALLOC_LEN           SZ_1M
27 #define CONFIG_SYS_SDRAM_BASE           EMC_DYCS0_BASE
28 #define CONFIG_SYS_SDRAM_SIZE           SZ_64M
29 #define CONFIG_SYS_MEMTEST_START        (CONFIG_SYS_SDRAM_BASE + SZ_32K)
30 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_TEXT_BASE - SZ_1M)
31
32 #define CONFIG_SYS_LOAD_ADDR            (CONFIG_SYS_SDRAM_BASE + SZ_32K)
33
34 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + SZ_4K \
35                                          - GENERATED_GBL_DATA_SIZE)
36
37 /*
38  * Serial Driver
39  */
40 #define CONFIG_SYS_LPC32XX_UART         5   /* UART5 */
41
42 /*
43  * DMA
44  */
45 #if !defined(CONFIG_SPL_BUILD)
46 #define CONFIG_DMA_LPC32XX
47 #endif
48
49 /*
50  * I2C
51  */
52 #define CONFIG_SYS_I2C
53 #define CONFIG_SYS_I2C_LPC32XX
54 #define CONFIG_SYS_I2C_SPEED            100000
55
56 /*
57  * GPIO
58  */
59 #define CONFIG_LPC32XX_GPIO
60
61 /*
62  * SSP/SPI
63  */
64 #define CONFIG_LPC32XX_SSP_TIMEOUT      100000
65
66 /*
67  * Ethernet
68  */
69 #define CONFIG_RMII
70 #define CONFIG_PHY_SMSC
71 #define CONFIG_LPC32XX_ETH
72 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
73
74 /*
75  * NOR Flash
76  */
77 #define CONFIG_SYS_MAX_FLASH_BANKS      1
78 #define CONFIG_SYS_MAX_FLASH_SECT       71
79 #define CONFIG_SYS_FLASH_BASE           EMC_CS0_BASE
80 #define CONFIG_SYS_FLASH_SIZE           SZ_4M
81 #define CONFIG_SYS_FLASH_CFI
82
83 /*
84  * NAND controller
85  */
86 #define CONFIG_SYS_NAND_BASE            SLC_NAND_BASE
87 #define CONFIG_SYS_MAX_NAND_DEVICE      1
88 #define CONFIG_SYS_NAND_BASE_LIST       { CONFIG_SYS_NAND_BASE }
89
90 /*
91  * NAND chip timings
92  */
93 #define CONFIG_LPC32XX_NAND_SLC_WDR_CLKS        14
94 #define CONFIG_LPC32XX_NAND_SLC_WWIDTH          66666666
95 #define CONFIG_LPC32XX_NAND_SLC_WHOLD           200000000
96 #define CONFIG_LPC32XX_NAND_SLC_WSETUP          50000000
97 #define CONFIG_LPC32XX_NAND_SLC_RDR_CLKS        14
98 #define CONFIG_LPC32XX_NAND_SLC_RWIDTH          66666666
99 #define CONFIG_LPC32XX_NAND_SLC_RHOLD           200000000
100 #define CONFIG_LPC32XX_NAND_SLC_RSETUP          50000000
101
102 #define CONFIG_SYS_NAND_BLOCK_SIZE              0x20000
103 #define CONFIG_SYS_NAND_PAGE_SIZE               NAND_LARGE_BLOCK_PAGE_SIZE
104 #define CONFIG_SYS_NAND_USE_FLASH_BBT
105
106 /*
107  * USB
108  */
109 #define CONFIG_USB_OHCI_LPC32XX
110 #define CONFIG_USB_ISP1301_I2C_ADDR             0x2d
111
112 /*
113  * U-Boot General Configurations
114  */
115 #define CONFIG_SYS_CBSIZE               1024
116 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
117
118 /*
119  * Pass open firmware flat tree
120  */
121
122 /*
123  * Environment
124  */
125 #define CONFIG_ENV_SIZE                 SZ_128K
126 #define CONFIG_ENV_OFFSET               0x000A0000
127
128 #define CONFIG_BOOTCOMMAND                      \
129         "dhcp; "                                \
130         "tftp ${loadaddr} ${serverip}:${tftpdir}/${bootfile}; "         \
131         "tftp ${dtbaddr} ${serverip}:${tftpdir}/devkit3250.dtb; "       \
132         "setenv nfsargs ip=dhcp root=/dev/nfs nfsroot=${serverip}:${nfsroot},tcp; "     \
133         "setenv bootargs ${bootargs} ${nfsargs} ${userargs}; "                  \
134         "bootm ${loadaddr} - ${dtbaddr}"
135
136 #define CONFIG_EXTRA_ENV_SETTINGS               \
137         "autoload=no\0"                         \
138         "ethaddr=00:01:90:00:C0:81\0"           \
139         "dtbaddr=0x81000000\0"                  \
140         "nfsroot=/opt/projects/images/vladimir/oe/devkit3250/rootfs\0"  \
141         "tftpdir=vladimir/oe/devkit3250\0"      \
142         "userargs=oops=panic\0"
143
144 /*
145  * U-Boot Commands
146  */
147
148 /*
149  * Boot Linux
150  */
151 #define CONFIG_CMDLINE_TAG
152 #define CONFIG_SETUP_MEMORY_TAGS
153
154 #define CONFIG_BOOTFILE                 "uImage"
155 #define CONFIG_LOADADDR                 0x80008000
156
157 /*
158  * SPL specific defines
159  */
160 /* SPL will be executed at offset 0 */
161 #define CONFIG_SPL_TEXT_BASE            0x00000000
162
163 /* SPL will use SRAM as stack */
164 #define CONFIG_SPL_STACK                0x0000FFF8
165
166 /* Use the framework and generic lib */
167
168 /* SPL will use serial */
169
170 /* SPL loads an image from NAND */
171 #define CONFIG_SPL_NAND_RAW_ONLY
172 #define CONFIG_SPL_NAND_DRIVERS
173
174 #define CONFIG_SPL_NAND_ECC
175 #define CONFIG_SPL_NAND_SOFTECC
176
177 #define CONFIG_SPL_MAX_SIZE             0x20000
178 #define CONFIG_SPL_PAD_TO               CONFIG_SPL_MAX_SIZE
179
180 /* U-Boot will be 0x60000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */
181 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x40000
182 #define CONFIG_SYS_NAND_U_BOOT_SIZE     0x60000
183
184 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
185 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
186
187 /* See common/spl/spl.c  spl_set_header_raw_uboot() */
188 #define CONFIG_SYS_MONITOR_LEN          CONFIG_SYS_NAND_U_BOOT_SIZE
189
190 /*
191  * Include SoC specific configuration
192  */
193 #include <asm/arch/config.h>
194
195 #endif  /* __CONFIG_DEVKIT3250_H__*/